{"id":"https://openalex.org/W2137266415","doi":"https://doi.org/10.1109/icecs.2007.4511124","title":"Routability-Driven Track Routing for Coupling Capacitance Reduction","display_name":"Routability-Driven Track Routing for Coupling Capacitance Reduction","publication_year":2007,"publication_date":"2007-12-01","ids":{"openalex":"https://openalex.org/W2137266415","doi":"https://doi.org/10.1109/icecs.2007.4511124","mag":"2137266415"},"language":"en","primary_location":{"id":"doi:10.1109/icecs.2007.4511124","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2007.4511124","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 14th IEEE International Conference on Electronics, Circuits and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5071940138","display_name":"Jin-Tai Yan","orcid":"https://orcid.org/0000-0002-7614-2545"},"institutions":[{"id":"https://openalex.org/I59460038","display_name":"Chung Hua University","ror":"https://ror.org/01yzz0f51","country_code":"TW","type":"education","lineage":["https://openalex.org/I59460038"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Jin-Tai Yan","raw_affiliation_strings":["Department of Computer Science and Information Engineering, Chung-Hua University, Hsinchu, Taiwan, R.O.C","Chung-Hua Univ. Hsinchu, Hsinchu"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Information Engineering, Chung-Hua University, Hsinchu, Taiwan, R.O.C","institution_ids":["https://openalex.org/I59460038"]},{"raw_affiliation_string":"Chung-Hua Univ. Hsinchu, Hsinchu","institution_ids":["https://openalex.org/I59460038"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100442703","display_name":"Zhiwei Chen","orcid":"https://orcid.org/0000-0002-1033-1482"},"institutions":[{"id":"https://openalex.org/I59460038","display_name":"Chung Hua University","ror":"https://ror.org/01yzz0f51","country_code":"TW","type":"education","lineage":["https://openalex.org/I59460038"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Zhi-Wei Chen","raw_affiliation_strings":["Department of Computer Science and Information Engineering, Chung-Hua University, Hsinchu, Taiwan, R.O.C","Department of Computer Science and Information Engineering, Chung-Hua University, Hsinchu, Taiwan, R. O. C"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Information Engineering, Chung-Hua University, Hsinchu, Taiwan, R.O.C","institution_ids":["https://openalex.org/I59460038"]},{"raw_affiliation_string":"Department of Computer Science and Information Engineering, Chung-Hua University, Hsinchu, Taiwan, R. O. C","institution_ids":["https://openalex.org/I59460038"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5003172064","display_name":"Kuen-Ming Lin","orcid":null},"institutions":[{"id":"https://openalex.org/I59460038","display_name":"Chung Hua University","ror":"https://ror.org/01yzz0f51","country_code":"TW","type":"education","lineage":["https://openalex.org/I59460038"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Kuen-Ming Lin","raw_affiliation_strings":["Department of Computer Science and Information Engineering, Chung-Hua University, Hsinchu, Taiwan, R.O.C","Department of Computer Science and Information Engineering, Chung-Hua University, Hsinchu, Taiwan, R. O. C"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Information Engineering, Chung-Hua University, Hsinchu, Taiwan, R.O.C","institution_ids":["https://openalex.org/I59460038"]},{"raw_affiliation_string":"Department of Computer Science and Information Engineering, Chung-Hua University, Hsinchu, Taiwan, R. O. C","institution_ids":["https://openalex.org/I59460038"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5071940138"],"corresponding_institution_ids":["https://openalex.org/I59460038"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.16608331,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"849","last_page":"852"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.7458934187889099},{"id":"https://openalex.org/keywords/capacitance","display_name":"Capacitance","score":0.6828137636184692},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.6212673783302307},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.6069451570510864},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5599892139434814},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.49343958497047424},{"id":"https://openalex.org/keywords/place-and-route","display_name":"Place and route","score":0.46912121772766113},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.45306476950645447},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3284042775630951},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3220008909702301},{"id":"https://openalex.org/keywords/mathematical-optimization","display_name":"Mathematical optimization","score":0.16519254446029663},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.11942365765571594}],"concepts":[{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.7458934187889099},{"id":"https://openalex.org/C30066665","wikidata":"https://www.wikidata.org/wiki/Q164399","display_name":"Capacitance","level":3,"score":0.6828137636184692},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.6212673783302307},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.6069451570510864},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5599892139434814},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.49343958497047424},{"id":"https://openalex.org/C127879752","wikidata":"https://www.wikidata.org/wiki/Q3390760","display_name":"Place and route","level":3,"score":0.46912121772766113},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.45306476950645447},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3284042775630951},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3220008909702301},{"id":"https://openalex.org/C126255220","wikidata":"https://www.wikidata.org/wiki/Q141495","display_name":"Mathematical optimization","level":1,"score":0.16519254446029663},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.11942365765571594},{"id":"https://openalex.org/C147789679","wikidata":"https://www.wikidata.org/wiki/Q11372","display_name":"Physical chemistry","level":1,"score":0.0},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0},{"id":"https://openalex.org/C17525397","wikidata":"https://www.wikidata.org/wiki/Q176140","display_name":"Electrode","level":2,"score":0.0},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icecs.2007.4511124","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2007.4511124","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 14th IEEE International Conference on Electronics, Circuits and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5799999833106995,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W2003437409","https://openalex.org/W2023811290","https://openalex.org/W2115602380","https://openalex.org/W2121290396","https://openalex.org/W2123728905","https://openalex.org/W2128732569","https://openalex.org/W2129736362","https://openalex.org/W2136728320","https://openalex.org/W2159490969","https://openalex.org/W2169531002","https://openalex.org/W2201681339","https://openalex.org/W2997462554","https://openalex.org/W4231387309","https://openalex.org/W4244849466","https://openalex.org/W4255156567","https://openalex.org/W4255326129","https://openalex.org/W4255649577","https://openalex.org/W6678108464","https://openalex.org/W6837023013"],"related_works":["https://openalex.org/W4205718258","https://openalex.org/W1989674257","https://openalex.org/W2119373721","https://openalex.org/W2061217021","https://openalex.org/W2153380648","https://openalex.org/W2165545669","https://openalex.org/W2057027737","https://openalex.org/W2168019708","https://openalex.org/W2170891313","https://openalex.org/W2144122197"],"abstract_inverted_index":{"Given":[0],"a":[1],"routing":[2,70],"panel,":[3,36],"the":[4,16,21,25,35],"routability-driven":[5,29,54],"ordering":[6,30],"and":[7,31],"location":[8,32],"constraints":[9,33],"can":[10],"be":[11],"firstly":[12],"set":[13],"according":[14],"to":[15,48],"pin":[17],"positions":[18],"of":[19],"all":[20],"wire":[22],"segments":[23],"in":[24,34,72],"panel":[26],"Based":[27],"on":[28],"an":[37],"ASAP-based":[38,64],"scheduling":[39,65],"approach":[40,66],"with":[41],"efficient":[42],"space":[43],"insertion":[44],"is":[45],"further":[46],"proposed":[47,63],"reduce":[49],"total":[50],"coupling":[51],"capacitance":[52],"for":[53,76],"track":[55],"routing.":[56],"The":[57],"experimental":[58],"results":[59,71],"show":[60],"that":[61],"our":[62],"obtains":[67],"very":[68],"promising":[69],"reasonable":[73],"CPU":[74],"time":[75],"several":[77],"benchmark":[78],"circuits.":[79]},"counts_by_year":[],"updated_date":"2026-03-20T20:47:17.329874","created_date":"2025-10-10T00:00:00"}