{"id":"https://openalex.org/W2112501464","doi":"https://doi.org/10.1109/icecs.2007.4510957","title":"Systematic Offset Detection and Evaluation Using Hierarchical Graph-Based Sizing and Biasing","display_name":"Systematic Offset Detection and Evaluation Using Hierarchical Graph-Based Sizing and Biasing","publication_year":2007,"publication_date":"2007-12-01","ids":{"openalex":"https://openalex.org/W2112501464","doi":"https://doi.org/10.1109/icecs.2007.4510957","mag":"2112501464"},"language":"en","primary_location":{"id":"doi:10.1109/icecs.2007.4510957","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2007.4510957","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 14th IEEE International Conference on Electronics, Circuits and Systems","raw_type":"proceedings-article"},"type":"preprint","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5086820986","display_name":"Ramy Iskander","orcid":null},"institutions":[{"id":"https://openalex.org/I39804081","display_name":"Sorbonne Universit\u00e9","ror":"https://ror.org/02en5vm52","country_code":"FR","type":"education","lineage":["https://openalex.org/I39804081"]}],"countries":["FR"],"is_corresponding":true,"raw_author_name":"Ramy Iskander","raw_affiliation_strings":["Universit\u00e9 Pierre et Marie Curie, LIP6-SOC Laboratory, 4 Place Jussieu, 75252 Paris, France. ramy.iskander@lip6.fr","Univ. Pierre et Marie Curie, Paris"],"affiliations":[{"raw_affiliation_string":"Universit\u00e9 Pierre et Marie Curie, LIP6-SOC Laboratory, 4 Place Jussieu, 75252 Paris, France. ramy.iskander@lip6.fr","institution_ids":["https://openalex.org/I39804081"]},{"raw_affiliation_string":"Univ. Pierre et Marie Curie, Paris","institution_ids":["https://openalex.org/I39804081"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5105838525","display_name":"Marie-Minerve Louerat","orcid":null},"institutions":[{"id":"https://openalex.org/I39804081","display_name":"Sorbonne Universit\u00e9","ror":"https://ror.org/02en5vm52","country_code":"FR","type":"education","lineage":["https://openalex.org/I39804081"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Marie-Minerve Louerat","raw_affiliation_strings":["Universit\u00e9 Pierre et Marie Curie, LIP6-SOC Laboratory, 4 Place Jussieu, 75252 Paris, France. marie-minerve.louerat@lip6.fr","Univ. Pierre et Marie Curie, Paris"],"affiliations":[{"raw_affiliation_string":"Universit\u00e9 Pierre et Marie Curie, LIP6-SOC Laboratory, 4 Place Jussieu, 75252 Paris, France. marie-minerve.louerat@lip6.fr","institution_ids":["https://openalex.org/I39804081"]},{"raw_affiliation_string":"Univ. Pierre et Marie Curie, Paris","institution_ids":["https://openalex.org/I39804081"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5105780992","display_name":"Andreas Kaiser","orcid":null},"institutions":[{"id":"https://openalex.org/I3132279224","display_name":"Institut Sup\u00e9rieur de l'\u00c9lectronique et du Num\u00e9rique","ror":"https://ror.org/017h2rd72","country_code":"FR","type":"education","lineage":["https://openalex.org/I3132279224"]},{"id":"https://openalex.org/I4210123471","display_name":"Institut d'\u00e9lectronique de micro\u00e9lectronique et de nanotechnologie","ror":"https://ror.org/02q4res37","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I137614889","https://openalex.org/I2279609970","https://openalex.org/I3132279224","https://openalex.org/I4210095849","https://openalex.org/I4210123471","https://openalex.org/I4387154098","https://openalex.org/I70348806","https://openalex.org/I70348806","https://openalex.org/I7454413"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Andreas Kaiser","raw_affiliation_strings":["IEMN, ISEN Department, 41 Bld. Vauban, 59046 Lille Cedex, France. andreas.kaiser@isen.fr"],"affiliations":[{"raw_affiliation_string":"IEMN, ISEN Department, 41 Bld. Vauban, 59046 Lille Cedex, France. andreas.kaiser@isen.fr","institution_ids":["https://openalex.org/I3132279224","https://openalex.org/I4210123471"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5086820986"],"corresponding_institution_ids":["https://openalex.org/I39804081"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.1519802,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"170","last_page":"173"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/sizing","display_name":"Sizing","score":0.8485384583473206},{"id":"https://openalex.org/keywords/biasing","display_name":"Biasing","score":0.7826663255691528},{"id":"https://openalex.org/keywords/offset","display_name":"Offset (computer science)","score":0.7530504465103149},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.683454155921936},{"id":"https://openalex.org/keywords/graph","display_name":"Graph","score":0.5684174299240112},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.5187807083129883},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.47659581899642944},{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.47232216596603394},{"id":"https://openalex.org/keywords/input-offset-voltage","display_name":"Input offset voltage","score":0.42750105261802673},{"id":"https://openalex.org/keywords/operational-amplifier","display_name":"Operational amplifier","score":0.37744566798210144},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.350418359041214},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.32152971625328064},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.2715698480606079},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.15866652131080627},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.13846611976623535},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.0795762836933136}],"concepts":[{"id":"https://openalex.org/C2777767291","wikidata":"https://www.wikidata.org/wiki/Q1080291","display_name":"Sizing","level":2,"score":0.8485384583473206},{"id":"https://openalex.org/C20254490","wikidata":"https://www.wikidata.org/wiki/Q719550","display_name":"Biasing","level":3,"score":0.7826663255691528},{"id":"https://openalex.org/C175291020","wikidata":"https://www.wikidata.org/wiki/Q1156822","display_name":"Offset (computer science)","level":2,"score":0.7530504465103149},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.683454155921936},{"id":"https://openalex.org/C132525143","wikidata":"https://www.wikidata.org/wiki/Q141488","display_name":"Graph","level":2,"score":0.5684174299240112},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.5187807083129883},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.47659581899642944},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.47232216596603394},{"id":"https://openalex.org/C63651839","wikidata":"https://www.wikidata.org/wiki/Q478566","display_name":"Input offset voltage","level":5,"score":0.42750105261802673},{"id":"https://openalex.org/C145366948","wikidata":"https://www.wikidata.org/wiki/Q178947","display_name":"Operational amplifier","level":4,"score":0.37744566798210144},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.350418359041214},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.32152971625328064},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.2715698480606079},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.15866652131080627},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.13846611976623535},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0795762836933136},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/icecs.2007.4510957","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2007.4510957","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 14th IEEE International Conference on Electronics, Circuits and Systems","raw_type":"proceedings-article"},{"id":"pmh:oai:HAL:hal-01334848v1","is_oa":false,"landing_page_url":"https://hal.science/hal-01334848","pdf_url":null,"source":{"id":"https://openalex.org/S4306402512","display_name":"HAL (Le Centre pour la Communication Scientifique Directe)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I1294671590","host_organization_name":"Centre National de la Recherche Scientifique","host_organization_lineage":["https://openalex.org/I1294671590"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"14th IEEE International Conference on Electronics, Circuits, and Systems (ICECS), Dec 2007, Marrackech, Morocco. pp.170-173, &#x27E8;10.1109/ICECS.2007.4510957&#x27E9;","raw_type":"Conference papers"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8100000023841858,"id":"https://metadata.un.org/sdg/16","display_name":"Peace, Justice and strong institutions"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W1542314983","https://openalex.org/W1959530538","https://openalex.org/W2001491094","https://openalex.org/W2100925048","https://openalex.org/W2141374207","https://openalex.org/W2547920508","https://openalex.org/W4230993626","https://openalex.org/W4253023236"],"related_works":["https://openalex.org/W1560414352","https://openalex.org/W4310191457","https://openalex.org/W4361800525","https://openalex.org/W1971997791","https://openalex.org/W1596270481","https://openalex.org/W2594925873","https://openalex.org/W2128994505","https://openalex.org/W4240158017","https://openalex.org/W2913250844","https://openalex.org/W1510516282"],"abstract_inverted_index":{"A":[0],"hierarchical":[1],"graph-based":[2],"sizing":[3,101],"and":[4,46],"biasing":[5],"method":[6,23,39,98],"of":[7,29,31,57,87,102],"analog":[8,34],"circuits":[9],"has":[10],"been":[11],"previously":[12],"developed.":[13],"However,":[14],"conflicts":[15,45],"appear":[16],"in":[17,33],"dependency":[18],"graphs":[19],"generated":[20],"by":[21,49,81],"our":[22,97],"due":[24],"to":[25,84,99],"the":[26,60,71,85,88,100],"large":[27],"number":[28],"degrees":[30,56],"freedom":[32,58],"design.":[35],"Therefore,":[36],"an":[37,91],"enhanced":[38],"is":[40,68],"presented":[41],"that":[42],"automatically":[43],"detects":[44],"resolves":[47],"them":[48],"inserting":[50],"systematic":[51,66],"offset":[52,67],"voltages":[53],"as":[54,70],"additional":[55],"into":[59],"graph.":[61],"During":[62],"graph":[63],"evaluation,":[64],"a":[65,103],"evaluated":[69],"voltage":[72],"difference":[73],"between":[74],"conflicting":[75],"nodes,":[76],"which":[77],"can":[78],"be":[79],"eliminated":[80],"transposing":[82],"it":[83],"inputs":[86],"circuit.":[89],"As":[90],"example,":[92],"we":[93],"have":[94],"successfully":[95],"applied":[96],"single-ended":[104],"two-stage":[105],"operational":[106],"amplifier.":[107]},"counts_by_year":[],"updated_date":"2026-03-20T20:47:17.329874","created_date":"2025-10-10T00:00:00"}
