{"id":"https://openalex.org/W1972410256","doi":"https://doi.org/10.1109/icecs.2005.4633409","title":"Development languages and environments for induction cooking system design and simulation","display_name":"Development languages and environments for induction cooking system design and simulation","publication_year":2005,"publication_date":"2005-12-01","ids":{"openalex":"https://openalex.org/W1972410256","doi":"https://doi.org/10.1109/icecs.2005.4633409","mag":"1972410256"},"language":"en","primary_location":{"id":"doi:10.1109/icecs.2005.4633409","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2005.4633409","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2005 12th IEEE International Conference on Electronics, Circuits and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5042679468","display_name":"Alessio Beato","orcid":null},"institutions":[{"id":"https://openalex.org/I122534668","display_name":"Marche Polytechnic University","ror":"https://ror.org/00x69rs40","country_code":"IT","type":"education","lineage":["https://openalex.org/I122534668"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Alessio Beato","raw_affiliation_strings":["DEIT - Universit\u00e0 Politecnica delle Marche Via Brecce Bianche, 60131 Ancona (ITALY)","DEIT, Univ. Politec. delle Marche, Ancona"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"DEIT - Universit\u00e0 Politecnica delle Marche Via Brecce Bianche, 60131 Ancona (ITALY)","institution_ids":["https://openalex.org/I122534668"]},{"raw_affiliation_string":"DEIT, Univ. Politec. delle Marche, Ancona","institution_ids":["https://openalex.org/I122534668"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5020528874","display_name":"Massimo Conti","orcid":"https://orcid.org/0000-0002-7622-0857"},"institutions":[{"id":"https://openalex.org/I122534668","display_name":"Marche Polytechnic University","ror":"https://ror.org/00x69rs40","country_code":"IT","type":"education","lineage":["https://openalex.org/I122534668"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Massimo Conti","raw_affiliation_strings":["DEIT - Universit\u00e0 Politecnica delle Marche Via Brecce Bianche, 60131 Ancona (ITALY)","DEIT, Univ. Politec. delle Marche, Ancona"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"DEIT - Universit\u00e0 Politecnica delle Marche Via Brecce Bianche, 60131 Ancona (ITALY)","institution_ids":["https://openalex.org/I122534668"]},{"raw_affiliation_string":"DEIT, Univ. Politec. delle Marche, Ancona","institution_ids":["https://openalex.org/I122534668"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5053388611","display_name":"Claudio Turchetti","orcid":"https://orcid.org/0000-0001-8713-9790"},"institutions":[{"id":"https://openalex.org/I122534668","display_name":"Marche Polytechnic University","ror":"https://ror.org/00x69rs40","country_code":"IT","type":"education","lineage":["https://openalex.org/I122534668"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Claudio Turchetti","raw_affiliation_strings":["DEIT - Universit\u00e0 Politecnica delle Marche Via Brecce Bianche, 60131 Ancona (ITALY)","DEIT, Univ. Politec. delle Marche, Ancona"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"DEIT - Universit\u00e0 Politecnica delle Marche Via Brecce Bianche, 60131 Ancona (ITALY)","institution_ids":["https://openalex.org/I122534668"]},{"raw_affiliation_string":"DEIT, Univ. Politec. delle Marche, Ancona","institution_ids":["https://openalex.org/I122534668"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5067504553","display_name":"Giovanni B. Vece","orcid":null},"institutions":[{"id":"https://openalex.org/I122534668","display_name":"Marche Polytechnic University","ror":"https://ror.org/00x69rs40","country_code":"IT","type":"education","lineage":["https://openalex.org/I122534668"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Giovanni B. Vece","raw_affiliation_strings":["DEIT - Universit\u00e0 Politecnica delle Marche Via Brecce Bianche, 60131 Ancona (ITALY)","DEIT, Univ. Politec. delle Marche, Ancona"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"DEIT - Universit\u00e0 Politecnica delle Marche Via Brecce Bianche, 60131 Ancona (ITALY)","institution_ids":["https://openalex.org/I122534668"]},{"raw_affiliation_string":"DEIT, Univ. Politec. delle Marche, Ancona","institution_ids":["https://openalex.org/I122534668"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.13634457,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12898","display_name":"Induction Heating and Inverter Technology","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2210","display_name":"Mechanical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12898","display_name":"Induction Heating and Inverter Technology","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2210","display_name":"Mechanical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10175","display_name":"Advanced DC-DC Converters","score":0.9836000204086304,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11444","display_name":"Electromagnetic Compatibility and Noise Suppression","score":0.9790999889373779,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/vhdl","display_name":"VHDL","score":0.7904088497161865},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7742301821708679},{"id":"https://openalex.org/keywords/systemc","display_name":"SystemC","score":0.6531389951705933},{"id":"https://openalex.org/keywords/matlab","display_name":"MATLAB","score":0.6454216241836548},{"id":"https://openalex.org/keywords/abstraction","display_name":"Abstraction","score":0.6261469125747681},{"id":"https://openalex.org/keywords/hardware-description-language","display_name":"Hardware description language","score":0.577189564704895},{"id":"https://openalex.org/keywords/extension","display_name":"Extension (predicate logic)","score":0.5235497355461121},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.48579859733581543},{"id":"https://openalex.org/keywords/signal","display_name":"SIGNAL (programming language)","score":0.4696060121059418},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.39227020740509033},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3864448070526123},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3780885636806488},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.2399134337902069}],"concepts":[{"id":"https://openalex.org/C36941000","wikidata":"https://www.wikidata.org/wiki/Q209455","display_name":"VHDL","level":3,"score":0.7904088497161865},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7742301821708679},{"id":"https://openalex.org/C2776928060","wikidata":"https://www.wikidata.org/wiki/Q1753563","display_name":"SystemC","level":2,"score":0.6531389951705933},{"id":"https://openalex.org/C2780365114","wikidata":"https://www.wikidata.org/wiki/Q169478","display_name":"MATLAB","level":2,"score":0.6454216241836548},{"id":"https://openalex.org/C124304363","wikidata":"https://www.wikidata.org/wiki/Q673661","display_name":"Abstraction","level":2,"score":0.6261469125747681},{"id":"https://openalex.org/C42143788","wikidata":"https://www.wikidata.org/wiki/Q173341","display_name":"Hardware description language","level":3,"score":0.577189564704895},{"id":"https://openalex.org/C2778029271","wikidata":"https://www.wikidata.org/wiki/Q5421931","display_name":"Extension (predicate logic)","level":2,"score":0.5235497355461121},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.48579859733581543},{"id":"https://openalex.org/C2779843651","wikidata":"https://www.wikidata.org/wiki/Q7390335","display_name":"SIGNAL (programming language)","level":2,"score":0.4696060121059418},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.39227020740509033},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3864448070526123},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3780885636806488},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.2399134337902069},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C111472728","wikidata":"https://www.wikidata.org/wiki/Q9471","display_name":"Epistemology","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/icecs.2005.4633409","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2005.4633409","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2005 12th IEEE International Conference on Electronics, Circuits and Systems","raw_type":"proceedings-article"},{"id":"pmh:oai:iris.univpm.it:11566/45420","is_oa":false,"landing_page_url":"http://hdl.handle.net/11566/45420","pdf_url":null,"source":{"id":"https://openalex.org/S4306402571","display_name":"Universit\u00e0 Politecnica delle Marche (Universit\u00e0 Politecnica delle Marche)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I122534668","host_organization_name":"Marche Polytechnic University","host_organization_lineage":["https://openalex.org/I122534668"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W55969900","https://openalex.org/W153116765","https://openalex.org/W1871931578","https://openalex.org/W1994333137","https://openalex.org/W2097655966","https://openalex.org/W2137588256","https://openalex.org/W2141035977","https://openalex.org/W2141528801","https://openalex.org/W2147289488","https://openalex.org/W2165128224","https://openalex.org/W2167577867","https://openalex.org/W6602253747"],"related_works":["https://openalex.org/W2110818533","https://openalex.org/W1984090905","https://openalex.org/W1917852300","https://openalex.org/W2384838054","https://openalex.org/W2139058049","https://openalex.org/W4233602124","https://openalex.org/W2548456620","https://openalex.org/W2156965212","https://openalex.org/W2075214143","https://openalex.org/W168509588"],"abstract_inverted_index":{"Multi-hob":[0],"induction":[1,71],"cooking":[2,72],"systems":[3],"can":[4,33],"achieve":[5],"a":[6,21],"high":[7],"degree":[8],"of":[9,16,39,50,58,69],"complexity.":[10],"Since":[11],"they":[12],"are":[13,46,63],"made":[14],"up":[15],"analogical":[17],"and":[18,28,41,48,55],"digital":[19],"blocks,":[20],"mixed-signal":[22],"environment":[23],"is":[24],"needed":[25],"for":[26],"modeling":[27,31,67],"simulation.":[29],"The":[30],"issue":[32],"be":[34],"approached":[35],"at":[36],"different":[37],"levels":[38],"abstraction":[40],"accuracy:":[42],"various":[43],"allowable":[44],"solutions":[45],"considered":[47],"some":[49],"them":[51],"(Matlab/Simulink,":[52],"VHDL,":[53],"VHDL-AMS":[54],"an":[56,70],"extension":[57],"SystemC":[59],"to":[60],"analog":[61],"mixed-signal),":[62],"employed":[64],"in":[65],"the":[66],"process":[68],"basic":[73],"system.":[74]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
