{"id":"https://openalex.org/W2541534986","doi":"https://doi.org/10.1109/icecs.2004.1399726","title":"A high performance data-path to accelerate DSP kernels","display_name":"A high performance data-path to accelerate DSP kernels","publication_year":2005,"publication_date":"2005-03-31","ids":{"openalex":"https://openalex.org/W2541534986","doi":"https://doi.org/10.1109/icecs.2004.1399726","mag":"2541534986"},"language":"en","primary_location":{"id":"doi:10.1109/icecs.2004.1399726","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2004.1399726","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2004 11th IEEE International Conference on Electronics, Circuits and Systems, 2004. ICECS 2004.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5018689567","display_name":"M.D. Galanis","orcid":"https://orcid.org/0000-0001-9330-0368"},"institutions":[{"id":"https://openalex.org/I174878644","display_name":"University of Patras","ror":"https://ror.org/017wvtq80","country_code":"GR","type":"education","lineage":["https://openalex.org/I174878644"]}],"countries":["GR"],"is_corresponding":true,"raw_author_name":"M.D. Galanis","raw_affiliation_strings":["VLSI Design Laboratory, Electrical & Computer Eng. Department, University of Patras, Patras, Greece"],"affiliations":[{"raw_affiliation_string":"VLSI Design Laboratory, Electrical & Computer Eng. Department, University of Patras, Patras, Greece","institution_ids":["https://openalex.org/I174878644"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5006492102","display_name":"Georgios Theodoridis","orcid":"https://orcid.org/0000-0002-2015-108X"},"institutions":[{"id":"https://openalex.org/I21370196","display_name":"Aristotle University of Thessaloniki","ror":"https://ror.org/02j61yw88","country_code":"GR","type":"education","lineage":["https://openalex.org/I21370196"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"G. Theodoridis","raw_affiliation_strings":["Section of Electronics & Computers, Physics Department, Aristotle University of Thessaloniki, Thessaloniki, Greece"],"affiliations":[{"raw_affiliation_string":"Section of Electronics & Computers, Physics Department, Aristotle University of Thessaloniki, Thessaloniki, Greece","institution_ids":["https://openalex.org/I21370196"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5083284025","display_name":"Spyros Tragoudas","orcid":"https://orcid.org/0009-0006-2575-3588"},"institutions":[{"id":"https://openalex.org/I110378019","display_name":"Southern Illinois University Carbondale","ror":"https://ror.org/049kefs16","country_code":"US","type":"education","lineage":["https://openalex.org/I110378019","https://openalex.org/I2801502357"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"S. Tragoudas","raw_affiliation_strings":["Electrical & Computer Eng. Department, Southem Illinois University, Carbondale, USA"],"affiliations":[{"raw_affiliation_string":"Electrical & Computer Eng. Department, Southem Illinois University, Carbondale, USA","institution_ids":["https://openalex.org/I110378019"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043131021","display_name":"Dimitrios Soudris","orcid":"https://orcid.org/0000-0002-6930-6847"},"institutions":[{"id":"https://openalex.org/I147962203","display_name":"Democritus University of Thrace","ror":"https://ror.org/03bfqnx40","country_code":"GR","type":"education","lineage":["https://openalex.org/I147962203"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"D. Soudris","raw_affiliation_strings":["VLSI Design Center, Electrical & Computer Eng. Department, Democriteus University, Xanthi, Greece"],"affiliations":[{"raw_affiliation_string":"VLSI Design Center, Electrical & Computer Eng. Department, Democriteus University, Xanthi, Greece","institution_ids":["https://openalex.org/I147962203"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5112615786","display_name":"C.E. Goutis","orcid":null},"institutions":[{"id":"https://openalex.org/I174878644","display_name":"University of Patras","ror":"https://ror.org/017wvtq80","country_code":"GR","type":"education","lineage":["https://openalex.org/I174878644"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"C.E. Goutis","raw_affiliation_strings":["VLSI Design Laboratory, Electrical & Computer Eng. Department, University of Patras, Patras, Greece"],"affiliations":[{"raw_affiliation_string":"VLSI Design Laboratory, Electrical & Computer Eng. Department, University of Patras, Patras, Greece","institution_ids":["https://openalex.org/I174878644"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5018689567"],"corresponding_institution_ids":["https://openalex.org/I174878644"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.35459184,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"495","last_page":"498"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7859026193618774},{"id":"https://openalex.org/keywords/chaining","display_name":"Chaining","score":0.7352046370506287},{"id":"https://openalex.org/keywords/component","display_name":"Component (thermodynamics)","score":0.6643916964530945},{"id":"https://openalex.org/keywords/path","display_name":"Path (computing)","score":0.6175205111503601},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.5348765850067139},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5102307796478271},{"id":"https://openalex.org/keywords/data-structure","display_name":"Data structure","score":0.4681409001350403},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4274718761444092},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.36785954236984253},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.07189127802848816}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7859026193618774},{"id":"https://openalex.org/C49020025","wikidata":"https://www.wikidata.org/wiki/Q1059099","display_name":"Chaining","level":2,"score":0.7352046370506287},{"id":"https://openalex.org/C168167062","wikidata":"https://www.wikidata.org/wiki/Q1117970","display_name":"Component (thermodynamics)","level":2,"score":0.6643916964530945},{"id":"https://openalex.org/C2777735758","wikidata":"https://www.wikidata.org/wiki/Q817765","display_name":"Path (computing)","level":2,"score":0.6175205111503601},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.5348765850067139},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5102307796478271},{"id":"https://openalex.org/C162319229","wikidata":"https://www.wikidata.org/wiki/Q175263","display_name":"Data structure","level":2,"score":0.4681409001350403},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4274718761444092},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.36785954236984253},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.07189127802848816},{"id":"https://openalex.org/C542102704","wikidata":"https://www.wikidata.org/wiki/Q183257","display_name":"Psychotherapist","level":1,"score":0.0},{"id":"https://openalex.org/C15744967","wikidata":"https://www.wikidata.org/wiki/Q9418","display_name":"Psychology","level":0,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C97355855","wikidata":"https://www.wikidata.org/wiki/Q11473","display_name":"Thermodynamics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icecs.2004.1399726","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2004.1399726","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2004 11th IEEE International Conference on Electronics, Circuits and Systems, 2004. ICECS 2004.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1592111125","https://openalex.org/W2022341273","https://openalex.org/W2042876290","https://openalex.org/W2111488604","https://openalex.org/W2117285153","https://openalex.org/W2129183345","https://openalex.org/W2137686989","https://openalex.org/W2163488221","https://openalex.org/W2169406908","https://openalex.org/W4249006057"],"related_works":["https://openalex.org/W1995270367","https://openalex.org/W2767696758","https://openalex.org/W4387627836","https://openalex.org/W2107793209","https://openalex.org/W2041767423","https://openalex.org/W3028301851","https://openalex.org/W4200061056","https://openalex.org/W2901315987","https://openalex.org/W2486348789","https://openalex.org/W1581002386"],"abstract_inverted_index":{"In":[0],"this":[1],"paper,":[2],"a":[3,17,41,64,108,111],"high-performance":[4],"data-path":[5,13,113],"for":[6],"accelerating":[7],"DSP":[8],"kernels":[9],"is":[10,14,38,91,105,114],"proposed.":[11],"The":[12,36],"based":[15],"on":[16],"flexible,":[18],"universal,":[19],"and":[20,31,44],"regular":[21],"component":[22,37,51],"that":[23,68],"allows":[24,52],"one":[25,53],"to":[26,54,79],"optimally":[27],"exploiting":[28],"both":[29],"inter-":[30],"intra-component":[32],"chaining":[33,75],"of":[34,76,83,88,101],"operations.":[35,77],"implemented":[39],"as":[40],"combinational":[42],"circuit":[43],"the":[45,50,69,74,80,84,86],"steering":[46],"logic":[47],"existing":[48],"inside":[49],"easily":[55],"realizing":[56],"any":[57],"desirable":[58],"complex":[59],"hardware":[60],"unit":[61],"-":[62,66],"called":[63],"template":[65],"so":[67],"data-path's":[70],"performance":[71],"benefits":[72],"from":[73],"Due":[78],"universal":[81],"structure":[82],"component,":[85],"synthesis":[87],"an":[89],"application":[90],"accomplished":[92],"by":[93],"unsophisticated,":[94],"yet":[95],"efficient,":[96],"algorithms.":[97],"An":[98],"average":[99],"reduction":[100],"20%":[102],"in":[103],"latency":[104],"achieved":[106],"when":[107],"comparison":[109],"with":[110],"template-based":[112],"performed.":[115]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
