{"id":"https://openalex.org/W2542397040","doi":"https://doi.org/10.1109/icecs.2004.1399640","title":"Low energy asynchronous adders","display_name":"Low energy asynchronous adders","publication_year":2005,"publication_date":"2005-03-31","ids":{"openalex":"https://openalex.org/W2542397040","doi":"https://doi.org/10.1109/icecs.2004.1399640","mag":"2542397040"},"language":"en","primary_location":{"id":"doi:10.1109/icecs.2004.1399640","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2004.1399640","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2004 11th IEEE International Conference on Electronics, Circuits and Systems, 2004. ICECS 2004.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5042817558","display_name":"I. Obridko","orcid":null},"institutions":[{"id":"https://openalex.org/I174306211","display_name":"Technion \u2013 Israel Institute of Technology","ror":"https://ror.org/03qryx823","country_code":"IL","type":"education","lineage":["https://openalex.org/I174306211"]}],"countries":["IL"],"is_corresponding":true,"raw_author_name":"I. Obridko","raw_affiliation_strings":["VLSI Systems Research Center, Technion-Israel Institute of Technology, Haifa, Israel"],"affiliations":[{"raw_affiliation_string":"VLSI Systems Research Center, Technion-Israel Institute of Technology, Haifa, Israel","institution_ids":["https://openalex.org/I174306211"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5010407295","display_name":"Ran Ginosar","orcid":null},"institutions":[{"id":"https://openalex.org/I174306211","display_name":"Technion \u2013 Israel Institute of Technology","ror":"https://ror.org/03qryx823","country_code":"IL","type":"education","lineage":["https://openalex.org/I174306211"]}],"countries":["IL"],"is_corresponding":false,"raw_author_name":"Ran Ginosar","raw_affiliation_strings":["VLSI Systems Research Center, Technion-Israel Institute of Technology, Haifa, Israel","[VLSI Systems Research Center, Technion-Israel Institute of Technology, Haifa, Israel]"],"affiliations":[{"raw_affiliation_string":"VLSI Systems Research Center, Technion-Israel Institute of Technology, Haifa, Israel","institution_ids":["https://openalex.org/I174306211"]},{"raw_affiliation_string":"[VLSI Systems Research Center, Technion-Israel Institute of Technology, Haifa, Israel]","institution_ids":["https://openalex.org/I174306211"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5042817558"],"corresponding_institution_ids":["https://openalex.org/I174306211"],"apc_list":null,"apc_paid":null,"fwci":0.7257,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.76950912,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"164","last_page":"167"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.8877537250518799},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.666057825088501},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6062359809875488},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.6002849340438843},{"id":"https://openalex.org/keywords/pass-transistor-logic","display_name":"Pass transistor logic","score":0.5749688744544983},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5545267462730408},{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.536419153213501},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.509128749370575},{"id":"https://openalex.org/keywords/adiabatic-circuit","display_name":"Adiabatic circuit","score":0.5038442015647888},{"id":"https://openalex.org/keywords/dissipation","display_name":"Dissipation","score":0.4645651876926422},{"id":"https://openalex.org/keywords/asynchronous-circuit","display_name":"Asynchronous circuit","score":0.4485437572002411},{"id":"https://openalex.org/keywords/logic-family","display_name":"Logic family","score":0.4335886538028717},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.40283024311065674},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.36941617727279663},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.26496732234954834},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.22856521606445312},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.1390242874622345},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.11502864956855774},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.08513033390045166},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.062431156635284424},{"id":"https://openalex.org/keywords/synchronous-circuit","display_name":"Synchronous circuit","score":0.062255799770355225}],"concepts":[{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.8877537250518799},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.666057825088501},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6062359809875488},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.6002849340438843},{"id":"https://openalex.org/C198521697","wikidata":"https://www.wikidata.org/wiki/Q7142438","display_name":"Pass transistor logic","level":4,"score":0.5749688744544983},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5545267462730408},{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.536419153213501},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.509128749370575},{"id":"https://openalex.org/C87606752","wikidata":"https://www.wikidata.org/wiki/Q4682637","display_name":"Adiabatic circuit","level":5,"score":0.5038442015647888},{"id":"https://openalex.org/C135402231","wikidata":"https://www.wikidata.org/wiki/Q898440","display_name":"Dissipation","level":2,"score":0.4645651876926422},{"id":"https://openalex.org/C87695204","wikidata":"https://www.wikidata.org/wiki/Q629971","display_name":"Asynchronous circuit","level":5,"score":0.4485437572002411},{"id":"https://openalex.org/C162454741","wikidata":"https://www.wikidata.org/wiki/Q173359","display_name":"Logic family","level":4,"score":0.4335886538028717},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.40283024311065674},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.36941617727279663},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.26496732234954834},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.22856521606445312},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.1390242874622345},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.11502864956855774},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.08513033390045166},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.062431156635284424},{"id":"https://openalex.org/C42196554","wikidata":"https://www.wikidata.org/wiki/Q1186179","display_name":"Synchronous circuit","level":4,"score":0.062255799770355225},{"id":"https://openalex.org/C97355855","wikidata":"https://www.wikidata.org/wiki/Q11473","display_name":"Thermodynamics","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/icecs.2004.1399640","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2004.1399640","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings of the 2004 11th IEEE International Conference on Electronics, Circuits and Systems, 2004. ICECS 2004.","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.206.502","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.206.502","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.ee.technion.ac.il/%7Eran/papers/LowEnergyAsyncAdder.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8999999761581421}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1559684271","https://openalex.org/W1604484881","https://openalex.org/W1854240545","https://openalex.org/W1935508356","https://openalex.org/W2108454771","https://openalex.org/W2145973680","https://openalex.org/W2150872535","https://openalex.org/W2479571977","https://openalex.org/W2487142227","https://openalex.org/W6638831585"],"related_works":["https://openalex.org/W2169842719","https://openalex.org/W2965791759","https://openalex.org/W2580743037","https://openalex.org/W2554253794","https://openalex.org/W2894573466","https://openalex.org/W1997869119","https://openalex.org/W2988242922","https://openalex.org/W3080459857","https://openalex.org/W2116676845","https://openalex.org/W3082411055"],"abstract_inverted_index":{"Asynchronous":[0],"circuits":[1,43,62],"are":[2,44,63,103],"often":[3],"presented":[4],"as":[5],"a":[6,38,66,115,119],"means":[7],"to":[8,71,84,91],"achieve":[9],"low":[10,18],"power":[11],"operation.":[12],"We":[13],"investigate":[14],"their":[15,72],"suitability":[16],"for":[17],"energy":[19,77,97,111],"applications,":[20],"where":[21,34],"long":[22],"battery":[23],"life":[24],"and":[25,33,48,58,134],"delay":[26],"tolerance":[27],"is":[28,36,82,89,112],"the":[29],"principal":[30],"design":[31],"goal,":[32],"performance":[35],"not":[37],"critical":[39],"requirement.":[40],"Three":[41],"adder":[42,122],"studied":[45],"-two":[46],"dynamic":[47,101,121],"one":[49],"based":[50],"on":[51],"pass-transistor":[52],"logic.":[53],"All":[54],"adders":[55],"combine":[56],"dual-rail":[57],"bundled-data":[59],"circuits.":[60],"The":[61,107],"simulated":[64],"at":[65],"wide":[67],"supply-voltage":[68],"range,":[69],"down":[70],"minimal":[73],"operating":[74],"point.":[75],"Leakage":[76],"(at":[78],"0.18":[79],"/spl":[80],"mu/m)":[81],"found":[83,90],"be":[85,92],"negligible.":[86],"Transistor":[87],"count":[88],"an":[93],"unreliable":[94],"predictor":[95],"of":[96,110,118],"dissipation.":[98],"Keepers":[99],"in":[100],"logic":[102],"eliminated":[104],"when":[105],"possible.":[106],"least":[108],"amount":[109],"dissipated":[113],"by":[114,125],"modified":[116],"version":[117],"two-bit":[120],"originally":[123],"proposed":[124],"K.S.":[126],"Chong":[127],"et":[128],"al.":[129],"(see":[130],"Int.":[131],"Symp.":[132],"Circuits":[133],"Systems,":[135],"2002).":[136]},"counts_by_year":[],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}
