{"id":"https://openalex.org/W2533790420","doi":"https://doi.org/10.1109/icecs.2003.1302012","title":"High speed FPGA implementation of RSA encryption algorithm","display_name":"High speed FPGA implementation of RSA encryption algorithm","publication_year":2004,"publication_date":"2004-06-03","ids":{"openalex":"https://openalex.org/W2533790420","doi":"https://doi.org/10.1109/icecs.2003.1302012","mag":"2533790420"},"language":"en","primary_location":{"id":"doi:10.1109/icecs.2003.1302012","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2003.1302012","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"10th IEEE International Conference on Electronics, Circuits and Systems, 2003. ICECS 2003. Proceedings of the 2003","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5030458751","display_name":"Omar Nibouche","orcid":"https://orcid.org/0000-0003-2149-2975"},"institutions":[{"id":"https://openalex.org/I138801177","display_name":"University of Ulster","ror":"https://ror.org/01yp9g959","country_code":"GB","type":"education","lineage":["https://openalex.org/I138801177"]}],"countries":["GB"],"is_corresponding":true,"raw_author_name":"O. Nibouche","raw_affiliation_strings":["Faculty of Informatics, University of Ulster, UK"],"affiliations":[{"raw_affiliation_string":"Faculty of Informatics, University of Ulster, UK","institution_ids":["https://openalex.org/I138801177"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102819800","display_name":"Mokhtar Nibouche","orcid":"https://orcid.org/0000-0003-0150-8087"},"institutions":[{"id":"https://openalex.org/I178535277","display_name":"University of the West of England","ror":"https://ror.org/02nwg5t34","country_code":"GB","type":"education","lineage":["https://openalex.org/I178535277"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"M. Nibouche","raw_affiliation_strings":["Faculty of Computing, Engineering and Mathematical Sciences, University of West of England, UK"],"affiliations":[{"raw_affiliation_string":"Faculty of Computing, Engineering and Mathematical Sciences, University of West of England, UK","institution_ids":["https://openalex.org/I178535277"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5033623398","display_name":"Ahmed Bouridane","orcid":"https://orcid.org/0000-0002-1474-2772"},"institutions":[{"id":"https://openalex.org/I126231945","display_name":"Queen's University Belfast","ror":"https://ror.org/00hswnk62","country_code":"GB","type":"education","lineage":["https://openalex.org/I126231945"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"A. Bouridane","raw_affiliation_strings":["School of Computer Science, Queen''s University Belfast, UK"],"affiliations":[{"raw_affiliation_string":"School of Computer Science, Queen''s University Belfast, UK","institution_ids":["https://openalex.org/I126231945"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5030458751"],"corresponding_institution_ids":["https://openalex.org/I138801177"],"apc_list":null,"apc_paid":null,"fwci":1.6682,"has_fulltext":false,"cited_by_count":18,"citation_normalized_percentile":{"value":0.90519751,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"204","last_page":"207"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11693","display_name":"Cryptography and Residue Arithmetic","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1710","display_name":"Information Systems"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11693","display_name":"Cryptography and Residue Arithmetic","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1710","display_name":"Information Systems"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/interleaving","display_name":"Interleaving","score":0.7658988833427429},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7425085306167603},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6955228447914124},{"id":"https://openalex.org/keywords/multiplier","display_name":"Multiplier (economics)","score":0.6780288815498352},{"id":"https://openalex.org/keywords/cryptography","display_name":"Cryptography","score":0.6071009635925293},{"id":"https://openalex.org/keywords/modular-arithmetic","display_name":"Modular arithmetic","score":0.5895377397537231},{"id":"https://openalex.org/keywords/modular-design","display_name":"Modular design","score":0.5628741979598999},{"id":"https://openalex.org/keywords/encryption","display_name":"Encryption","score":0.5373856425285339},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.47067269682884216},{"id":"https://openalex.org/keywords/modular-exponentiation","display_name":"Modular exponentiation","score":0.44482263922691345},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.4289829134941101},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3889826834201813},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.3423774242401123},{"id":"https://openalex.org/keywords/public-key-cryptography","display_name":"Public-key cryptography","score":0.3392256200313568},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3172494173049927},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.15472230315208435},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.08957979083061218}],"concepts":[{"id":"https://openalex.org/C28034677","wikidata":"https://www.wikidata.org/wiki/Q17092530","display_name":"Interleaving","level":2,"score":0.7658988833427429},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7425085306167603},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6955228447914124},{"id":"https://openalex.org/C124584101","wikidata":"https://www.wikidata.org/wiki/Q1053266","display_name":"Multiplier (economics)","level":2,"score":0.6780288815498352},{"id":"https://openalex.org/C178489894","wikidata":"https://www.wikidata.org/wiki/Q8789","display_name":"Cryptography","level":2,"score":0.6071009635925293},{"id":"https://openalex.org/C32049820","wikidata":"https://www.wikidata.org/wiki/Q319400","display_name":"Modular arithmetic","level":3,"score":0.5895377397537231},{"id":"https://openalex.org/C101468663","wikidata":"https://www.wikidata.org/wiki/Q1620158","display_name":"Modular design","level":2,"score":0.5628741979598999},{"id":"https://openalex.org/C148730421","wikidata":"https://www.wikidata.org/wiki/Q141090","display_name":"Encryption","level":2,"score":0.5373856425285339},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.47067269682884216},{"id":"https://openalex.org/C152763109","wikidata":"https://www.wikidata.org/wiki/Q1228841","display_name":"Modular exponentiation","level":4,"score":0.44482263922691345},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.4289829134941101},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3889826834201813},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.3423774242401123},{"id":"https://openalex.org/C203062551","wikidata":"https://www.wikidata.org/wiki/Q201339","display_name":"Public-key cryptography","level":3,"score":0.3392256200313568},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3172494173049927},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.15472230315208435},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.08957979083061218},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icecs.2003.1302012","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2003.1302012","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"10th IEEE International Conference on Electronics, Circuits and Systems, 2003. ICECS 2003. Proceedings of the 2003","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure","score":0.46000000834465027}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1996360405","https://openalex.org/W2004814164","https://openalex.org/W2120608395","https://openalex.org/W2123257885","https://openalex.org/W2127856956","https://openalex.org/W2136870067","https://openalex.org/W2161231595","https://openalex.org/W2163346939","https://openalex.org/W4232836212","https://openalex.org/W4237773356","https://openalex.org/W6684285051"],"related_works":["https://openalex.org/W3182915524","https://openalex.org/W2285294304","https://openalex.org/W1995898468","https://openalex.org/W2364059967","https://openalex.org/W2610264794","https://openalex.org/W2055766186","https://openalex.org/W2039465140","https://openalex.org/W2238095429","https://openalex.org/W3046800386","https://openalex.org/W2013253681"],"abstract_inverted_index":{"In":[0,90],"this":[1,101],"paper,":[2],"new":[3],"structures":[4,13,76,79],"that":[5,72,103],"implement":[6],"RSA":[7,75],"cryptographic":[8],"algorithm":[9],"are":[10,14,30,49],"presented.":[11],"These":[12],"built":[15,80],"using":[16],"a":[17,82,109,113],"modified":[18],"Montgomery":[19,42,84],"modular":[20,28],"multiplier,":[21],"where":[22],"the":[23,40,56,61,73,105],"operations":[24,54],"of":[25,66,88,92,107],"multiplication":[26],"and":[27,112],"reductions":[29],"carried":[31],"out":[32],"in":[33,39,68,86,100],"parallel":[34],"rather":[35],"than":[36],"interleaved":[37],"as":[38],"traditional":[41,83],"multiplier.":[43],"The":[44,64],"global":[45],"broadcast":[46],"data":[47],"lines":[48],"avoided":[50],"by":[51],"interleaving":[52],"two":[53],"into":[55],"same":[57],"structure,":[58],"thus":[59],"making":[60],"implementation":[62,67],"systolic.":[63],"results":[65],"FPGA":[69],"have":[70],"shown":[71,99],"proposed":[74],"outperformed":[77],"those":[78],"around":[81],"multiplier":[85],"terms":[87,91],"speed.":[89],"area":[93,115],"usage,":[94],"an":[95],"area-efficient":[96],"architecture":[97],"is":[98],"paper":[102],"has":[104],"merit":[106],"having":[108],"high":[110],"speed":[111],"reduced":[114],"usage":[116],"when":[117],"compared":[118],"with":[119],"other":[120],"architectures.":[121]},"counts_by_year":[{"year":2025,"cited_by_count":3},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-03-20T23:20:44.827607","created_date":"2025-10-10T00:00:00"}
