{"id":"https://openalex.org/W2534826798","doi":"https://doi.org/10.1109/icecs.2003.1301906","title":"Building blocks for a 100 MS/s, 10-b, 1.8 V CMOS cascaded folding &amp; interpolating A/D converter","display_name":"Building blocks for a 100 MS/s, 10-b, 1.8 V CMOS cascaded folding &amp; interpolating A/D converter","publication_year":2004,"publication_date":"2004-06-03","ids":{"openalex":"https://openalex.org/W2534826798","doi":"https://doi.org/10.1109/icecs.2003.1301906","mag":"2534826798"},"language":"en","primary_location":{"id":"doi:10.1109/icecs.2003.1301906","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2003.1301906","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"10th IEEE International Conference on Electronics, Circuits and Systems, 2003. ICECS 2003. Proceedings of the 2003","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5046148474","display_name":"Christos Kokozidis","orcid":null},"institutions":[{"id":"https://openalex.org/I200777214","display_name":"National and Kapodistrian University of Athens","ror":"https://ror.org/04gnjpq42","country_code":"GR","type":"education","lineage":["https://openalex.org/I200777214"]}],"countries":["GR"],"is_corresponding":true,"raw_author_name":"C. Kokozidis","raw_affiliation_strings":["Department of Informatics & Telecommunications, University of Athens (NKUA), Ilisia, Greece"],"affiliations":[{"raw_affiliation_string":"Department of Informatics & Telecommunications, University of Athens (NKUA), Ilisia, Greece","institution_ids":["https://openalex.org/I200777214"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5047120909","display_name":"S. Bouras","orcid":null},"institutions":[{"id":"https://openalex.org/I4210156054","display_name":"Athena Research and Innovation Center In Information Communication & Knowledge Technologies","ror":"https://ror.org/0576by029","country_code":"GR","type":"facility","lineage":["https://openalex.org/I4210156054"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"S. Bouras","raw_affiliation_strings":["Athena Semiconductors S.A., Athens, Greece"],"affiliations":[{"raw_affiliation_string":"Athena Semiconductors S.A., Athens, Greece","institution_ids":["https://openalex.org/I4210156054"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5114019291","display_name":"A. Arapoyanni","orcid":null},"institutions":[{"id":"https://openalex.org/I200777214","display_name":"National and Kapodistrian University of Athens","ror":"https://ror.org/04gnjpq42","country_code":"GR","type":"education","lineage":["https://openalex.org/I200777214"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"A. Arapoyanni","raw_affiliation_strings":["Department of Informatics & Telecommunications, University of Athens (NKUA), Ilisia, Greece"],"affiliations":[{"raw_affiliation_string":"Department of Informatics & Telecommunications, University of Athens (NKUA), Ilisia, Greece","institution_ids":["https://openalex.org/I200777214"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5046148474"],"corresponding_institution_ids":["https://openalex.org/I200777214"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.32896027,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"32","issue":null,"first_page":"794","last_page":"797"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/folding","display_name":"Folding (DSP implementation)","score":0.7366863489151001},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7334657907485962},{"id":"https://openalex.org/keywords/interpolation","display_name":"Interpolation (computer graphics)","score":0.6428030729293823},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.5765729546546936},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5400515198707581},{"id":"https://openalex.org/keywords/differential","display_name":"Differential (mechanical device)","score":0.5275960564613342},{"id":"https://openalex.org/keywords/sampling","display_name":"Sampling (signal processing)","score":0.48020634055137634},{"id":"https://openalex.org/keywords/range","display_name":"Range (aeronautics)","score":0.4596547484397888},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.41538581252098083},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3788618743419647},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.34083372354507446},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3227502405643463},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.1776437759399414}],"concepts":[{"id":"https://openalex.org/C2776545253","wikidata":"https://www.wikidata.org/wiki/Q5464292","display_name":"Folding (DSP implementation)","level":2,"score":0.7366863489151001},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7334657907485962},{"id":"https://openalex.org/C137800194","wikidata":"https://www.wikidata.org/wiki/Q11713455","display_name":"Interpolation (computer graphics)","level":3,"score":0.6428030729293823},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.5765729546546936},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5400515198707581},{"id":"https://openalex.org/C93226319","wikidata":"https://www.wikidata.org/wiki/Q193137","display_name":"Differential (mechanical device)","level":2,"score":0.5275960564613342},{"id":"https://openalex.org/C140779682","wikidata":"https://www.wikidata.org/wiki/Q210868","display_name":"Sampling (signal processing)","level":3,"score":0.48020634055137634},{"id":"https://openalex.org/C204323151","wikidata":"https://www.wikidata.org/wiki/Q905424","display_name":"Range (aeronautics)","level":2,"score":0.4596547484397888},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.41538581252098083},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3788618743419647},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.34083372354507446},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3227502405643463},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.1776437759399414},{"id":"https://openalex.org/C146978453","wikidata":"https://www.wikidata.org/wiki/Q3798668","display_name":"Aerospace engineering","level":1,"score":0.0},{"id":"https://openalex.org/C126042441","wikidata":"https://www.wikidata.org/wiki/Q1324888","display_name":"Frame (networking)","level":2,"score":0.0},{"id":"https://openalex.org/C106131492","wikidata":"https://www.wikidata.org/wiki/Q3072260","display_name":"Filter (signal processing)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icecs.2003.1301906","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2003.1301906","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"10th IEEE International Conference on Electronics, Circuits and Systems, 2003. ICECS 2003. Proceedings of the 2003","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.5400000214576721}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W196206388","https://openalex.org/W1965460613","https://openalex.org/W1966984911","https://openalex.org/W2031594108","https://openalex.org/W2079825871","https://openalex.org/W2108465270","https://openalex.org/W2125229334","https://openalex.org/W2125666370","https://openalex.org/W2138605002","https://openalex.org/W2141182161","https://openalex.org/W2148002174","https://openalex.org/W6658208916"],"related_works":["https://openalex.org/W3014521742","https://openalex.org/W2617868873","https://openalex.org/W3204141294","https://openalex.org/W4386230336","https://openalex.org/W4306968100","https://openalex.org/W2464627195","https://openalex.org/W2171986175","https://openalex.org/W2089791793","https://openalex.org/W2038858740","https://openalex.org/W1491218245"],"abstract_inverted_index":{"This":[0],"paper":[1],"describes":[2],"building":[3],"blocks":[4,44],"of":[5,61],"an":[6],"A/D":[7],"converter,":[8],"based":[9],"on":[10],"the":[11,30,36,62,68],"folding":[12],"and":[13,18,34,67],"interpolation":[14],"techniques,":[15],"for":[16,39],"mobile":[17],"wireless":[19],"telecommunication":[20],"applications.":[21,42],"The":[22,43,57],"differential":[23,69],"difference":[24],"technique":[25],"is":[26,64,73],"used":[27],"to":[28],"double":[29],"dynamic":[31],"input":[32,70],"range":[33,72],"relax":[35],"circuit":[37],"design":[38],"low":[40],"voltage":[41,71],"are":[45],"designed":[46],"in":[47],"a":[48],"standard":[49],"1.8":[50],"V":[51,75],"0.18":[52],"/spl":[53],"mu/m":[54],"CMOS":[55],"technology.":[56],"maximum":[58],"sampling":[59],"rate":[60],"converter":[63],"100":[65],"MS/s":[66],"2":[74],"peak-peak.":[76]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
