{"id":"https://openalex.org/W1589739876","doi":"https://doi.org/10.1109/icecs.2002.1046278","title":"Asynchronous data communication with low power for GALS systems","display_name":"Asynchronous data communication with low power for GALS systems","publication_year":2003,"publication_date":"2003-06-25","ids":{"openalex":"https://openalex.org/W1589739876","doi":"https://doi.org/10.1109/icecs.2002.1046278","mag":"1589739876"},"language":"en","primary_location":{"id":"doi:10.1109/icecs.2002.1046278","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2002.1046278","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"9th International Conference on Electronics, Circuits and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5072066970","display_name":"Shengxian Zhuang","orcid":"https://orcid.org/0000-0001-8576-666X"},"institutions":[{"id":"https://openalex.org/I102134673","display_name":"Link\u00f6ping University","ror":"https://ror.org/05ynxx418","country_code":"SE","type":"education","lineage":["https://openalex.org/I102134673"]}],"countries":["SE"],"is_corresponding":true,"raw_author_name":"Shengxian Zhuang","raw_affiliation_strings":["Electronics Systems, Department of Electrical Engineering, Link\u00f6ping University, Linkoping, Sweden","[Dept. of Electr. Eng., Linkoping Univ., Sweden]"],"affiliations":[{"raw_affiliation_string":"Electronics Systems, Department of Electrical Engineering, Link\u00f6ping University, Linkoping, Sweden","institution_ids":["https://openalex.org/I102134673"]},{"raw_affiliation_string":"[Dept. of Electr. Eng., Linkoping Univ., Sweden]","institution_ids":["https://openalex.org/I102134673"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100710867","display_name":"Weidong Li","orcid":"https://orcid.org/0000-0001-5559-7834"},"institutions":[{"id":"https://openalex.org/I102134673","display_name":"Link\u00f6ping University","ror":"https://ror.org/05ynxx418","country_code":"SE","type":"education","lineage":["https://openalex.org/I102134673"]}],"countries":["SE"],"is_corresponding":false,"raw_author_name":"Weidong Li","raw_affiliation_strings":["Electronics Systems, Department of Electrical Engineering, Link\u00f6ping University, Linkoping, Sweden","[Dept. of Electr. Eng., Linkoping Univ., Sweden]"],"affiliations":[{"raw_affiliation_string":"Electronics Systems, Department of Electrical Engineering, Link\u00f6ping University, Linkoping, Sweden","institution_ids":["https://openalex.org/I102134673"]},{"raw_affiliation_string":"[Dept. of Electr. Eng., Linkoping Univ., Sweden]","institution_ids":["https://openalex.org/I102134673"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5023601449","display_name":"Jonas Carlsson","orcid":null},"institutions":[{"id":"https://openalex.org/I102134673","display_name":"Link\u00f6ping University","ror":"https://ror.org/05ynxx418","country_code":"SE","type":"education","lineage":["https://openalex.org/I102134673"]}],"countries":["SE"],"is_corresponding":false,"raw_author_name":"J. Carlsson","raw_affiliation_strings":["Electronics Systems, Department of Electrical Engineering, Link\u00f6ping University, Linkoping, Sweden","[Dept. of Electr. Eng., Linkoping Univ., Sweden]"],"affiliations":[{"raw_affiliation_string":"Electronics Systems, Department of Electrical Engineering, Link\u00f6ping University, Linkoping, Sweden","institution_ids":["https://openalex.org/I102134673"]},{"raw_affiliation_string":"[Dept. of Electr. Eng., Linkoping Univ., Sweden]","institution_ids":["https://openalex.org/I102134673"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5088398100","display_name":"Kent Palmkvist","orcid":null},"institutions":[{"id":"https://openalex.org/I102134673","display_name":"Link\u00f6ping University","ror":"https://ror.org/05ynxx418","country_code":"SE","type":"education","lineage":["https://openalex.org/I102134673"]}],"countries":["SE"],"is_corresponding":false,"raw_author_name":"K. Palmkvist","raw_affiliation_strings":["Electronics Systems, Department of Electrical Engineering, Link\u00f6ping University, Linkoping, Sweden","[Dept. of Electr. Eng., Linkoping Univ., Sweden]"],"affiliations":[{"raw_affiliation_string":"Electronics Systems, Department of Electrical Engineering, Link\u00f6ping University, Linkoping, Sweden","institution_ids":["https://openalex.org/I102134673"]},{"raw_affiliation_string":"[Dept. of Electr. Eng., Linkoping Univ., Sweden]","institution_ids":["https://openalex.org/I102134673"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5077056160","display_name":"Lars Wanhammar","orcid":null},"institutions":[{"id":"https://openalex.org/I102134673","display_name":"Link\u00f6ping University","ror":"https://ror.org/05ynxx418","country_code":"SE","type":"education","lineage":["https://openalex.org/I102134673"]}],"countries":["SE"],"is_corresponding":false,"raw_author_name":"L. Wanhammar","raw_affiliation_strings":["Electronics Systems, Department of Electrical Engineering, Link\u00f6ping University, Linkoping, Sweden","[Dept. of Electr. Eng., Linkoping Univ., Sweden]"],"affiliations":[{"raw_affiliation_string":"Electronics Systems, Department of Electrical Engineering, Link\u00f6ping University, Linkoping, Sweden","institution_ids":["https://openalex.org/I102134673"]},{"raw_affiliation_string":"[Dept. of Electr. Eng., Linkoping Univ., Sweden]","institution_ids":["https://openalex.org/I102134673"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5072066970"],"corresponding_institution_ids":["https://openalex.org/I102134673"],"apc_list":null,"apc_paid":null,"fwci":2.7818,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":{"value":0.89734778,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"2","issue":null,"first_page":"753","last_page":"756"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/handshake","display_name":"Handshake","score":0.9339216947555542},{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.8828890323638916},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7555640935897827},{"id":"https://openalex.org/keywords/synchronizer","display_name":"Synchronizer","score":0.659701943397522},{"id":"https://openalex.org/keywords/handshaking","display_name":"Handshaking","score":0.555424153804779},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.5489939451217651},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5143615007400513},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5002861022949219},{"id":"https://openalex.org/keywords/asynchronous-system","display_name":"Asynchronous system","score":0.49932169914245605},{"id":"https://openalex.org/keywords/vhdl","display_name":"VHDL","score":0.4963100552558899},{"id":"https://openalex.org/keywords/power-analysis","display_name":"Power analysis","score":0.42067235708236694},{"id":"https://openalex.org/keywords/synchronization","display_name":"Synchronization (alternating current)","score":0.4173007011413574},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.37238842248916626},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3423672914505005},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.33994102478027344},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.3252703845500946},{"id":"https://openalex.org/keywords/synchronous-circuit","display_name":"Synchronous circuit","score":0.24664181470870972},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.20708364248275757},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.1725345253944397},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.13979533314704895},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.13879305124282837},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.13591361045837402},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.12550514936447144}],"concepts":[{"id":"https://openalex.org/C2778000800","wikidata":"https://www.wikidata.org/wiki/Q830043","display_name":"Handshake","level":3,"score":0.9339216947555542},{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.8828890323638916},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7555640935897827},{"id":"https://openalex.org/C66727535","wikidata":"https://www.wikidata.org/wiki/Q7662199","display_name":"Synchronizer","level":2,"score":0.659701943397522},{"id":"https://openalex.org/C58861099","wikidata":"https://www.wikidata.org/wiki/Q548838","display_name":"Handshaking","level":2,"score":0.555424153804779},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.5489939451217651},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5143615007400513},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5002861022949219},{"id":"https://openalex.org/C7923308","wikidata":"https://www.wikidata.org/wiki/Q4812211","display_name":"Asynchronous system","level":5,"score":0.49932169914245605},{"id":"https://openalex.org/C36941000","wikidata":"https://www.wikidata.org/wiki/Q209455","display_name":"VHDL","level":3,"score":0.4963100552558899},{"id":"https://openalex.org/C71743495","wikidata":"https://www.wikidata.org/wiki/Q2845210","display_name":"Power analysis","level":3,"score":0.42067235708236694},{"id":"https://openalex.org/C2778562939","wikidata":"https://www.wikidata.org/wiki/Q1298791","display_name":"Synchronization (alternating current)","level":3,"score":0.4173007011413574},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.37238842248916626},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3423672914505005},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.33994102478027344},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.3252703845500946},{"id":"https://openalex.org/C42196554","wikidata":"https://www.wikidata.org/wiki/Q1186179","display_name":"Synchronous circuit","level":4,"score":0.24664181470870972},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.20708364248275757},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.1725345253944397},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.13979533314704895},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.13879305124282837},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.13591361045837402},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.12550514936447144},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C178489894","wikidata":"https://www.wikidata.org/wiki/Q8789","display_name":"Cryptography","level":2,"score":0.0},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.0},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icecs.2002.1046278","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2002.1046278","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"9th International Conference on Electronics, Circuits and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.7200000286102295}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W1943426535","https://openalex.org/W1963518082","https://openalex.org/W2117897741","https://openalex.org/W2120480196","https://openalex.org/W2140792504","https://openalex.org/W2161849579","https://openalex.org/W2262053256"],"related_works":["https://openalex.org/W2347296673","https://openalex.org/W2521973011","https://openalex.org/W2036690923","https://openalex.org/W2061563403","https://openalex.org/W2019002109","https://openalex.org/W3163080401","https://openalex.org/W2390220487","https://openalex.org/W794031490","https://openalex.org/W847004690","https://openalex.org/W1490983863"],"abstract_inverted_index":{"In":[0],"this":[1],"paper,":[2],"we":[3],"propose":[4],"an":[5],"asynchronous":[6],"wrapper":[7],"with":[8,25,49,56,71],"new":[9],"handshake":[10,29],"circuits":[11,30,68,74],"and":[12,34,53,66,73],"low":[13,26],"swing":[14],"bus":[15],"drivers":[16],"for":[17,43],"data":[18],"communication":[19],"in":[20,76],"GALS":[21],"(globally-asynchronous":[22],"locally-synchronous)":[23],"systems":[24],"power.":[27],"The":[28,60],"include":[31],"two":[32,41],"data-ports":[33],"a":[35],"local":[36],"clock":[37],"controller.":[38],"We":[39],"present":[40],"approaches":[42],"the":[44,54,67],"implementation":[45],"of":[46],"data-ports;":[47],"one":[48],"pure":[50],"standard":[51,77],"cells":[52],"other":[55],"Muller":[57],"C":[58],"elements.":[59],"detailed":[61],"design":[62],"methodology":[63],"is":[64],"given":[65],"are":[69],"validated":[70],"VHDL":[72],"simulation":[75],"CMOS":[78],"technology.":[79]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
