{"id":"https://openalex.org/W1493861249","doi":"https://doi.org/10.1109/icecs.2002.1046207","title":"A mixed-signal SOC signal processor that incorporates all the drive electronics in a single-chip","display_name":"A mixed-signal SOC signal processor that incorporates all the drive electronics in a single-chip","publication_year":2003,"publication_date":"2003-06-25","ids":{"openalex":"https://openalex.org/W1493861249","doi":"https://doi.org/10.1109/icecs.2002.1046207","mag":"1493861249"},"language":"en","primary_location":{"id":"doi:10.1109/icecs.2002.1046207","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2002.1046207","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"9th International Conference on Electronics, Circuits and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5003928725","display_name":"M. Bathaee","orcid":"https://orcid.org/0000-0002-2272-3862"},"institutions":[{"id":"https://openalex.org/I4210100046","display_name":"Integra (United States)","ror":"https://ror.org/00ynqbp15","country_code":"US","type":"company","lineage":["https://openalex.org/I4210100046"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"M. Bathaee","raw_affiliation_strings":["LSI Design and Integration Corporation, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"LSI Design and Integration Corporation, USA","institution_ids":["https://openalex.org/I4210100046"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5110573913","display_name":"D.V. Nicolae","orcid":null},"institutions":[{"id":"https://openalex.org/I4210100046","display_name":"Integra (United States)","ror":"https://ror.org/00ynqbp15","country_code":"US","type":"company","lineage":["https://openalex.org/I4210100046"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"D. Nicolae","raw_affiliation_strings":["LSI Design and Integration Corporation, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"LSI Design and Integration Corporation, USA","institution_ids":["https://openalex.org/I4210100046"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5063508778","display_name":"Z. Moustoufi","orcid":null},"institutions":[{"id":"https://openalex.org/I4210100046","display_name":"Integra (United States)","ror":"https://ror.org/00ynqbp15","country_code":"US","type":"company","lineage":["https://openalex.org/I4210100046"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Z. Moustoufi","raw_affiliation_strings":["LSI Design and Integration Corporation, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"LSI Design and Integration Corporation, USA","institution_ids":["https://openalex.org/I4210100046"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5012452596","display_name":"D. Leonescu","orcid":null},"institutions":[{"id":"https://openalex.org/I4210100046","display_name":"Integra (United States)","ror":"https://ror.org/00ynqbp15","country_code":"US","type":"company","lineage":["https://openalex.org/I4210100046"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"D. Leonescu","raw_affiliation_strings":["LSI Design and Integration Corporation, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"LSI Design and Integration Corporation, USA","institution_ids":["https://openalex.org/I4210100046"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5027080175","display_name":"Radu Udrea","orcid":"https://orcid.org/0000-0002-6250-3477"},"institutions":[{"id":"https://openalex.org/I4210100046","display_name":"Integra (United States)","ror":"https://ror.org/00ynqbp15","country_code":"US","type":"company","lineage":["https://openalex.org/I4210100046"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"R.M. Udrea","raw_affiliation_strings":["LSI Design and Integration Corporation, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"LSI Design and Integration Corporation, USA","institution_ids":["https://openalex.org/I4210100046"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5062864988","display_name":"H. Ghezel","orcid":null},"institutions":[{"id":"https://openalex.org/I4210100046","display_name":"Integra (United States)","ror":"https://ror.org/00ynqbp15","country_code":"US","type":"company","lineage":["https://openalex.org/I4210100046"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"H. Ghezel","raw_affiliation_strings":["LSI Design and Integration Corporation, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"LSI Design and Integration Corporation, USA","institution_ids":["https://openalex.org/I4210100046"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5036699650","display_name":"C. Andrian-Albescu","orcid":null},"institutions":[{"id":"https://openalex.org/I4210100046","display_name":"Integra (United States)","ror":"https://ror.org/00ynqbp15","country_code":"US","type":"company","lineage":["https://openalex.org/I4210100046"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"C. Andrian-Albescu","raw_affiliation_strings":["LSI Design and Integration Corporation, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"LSI Design and Integration Corporation, USA","institution_ids":["https://openalex.org/I4210100046"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5007003944","display_name":"I. Minca","orcid":null},"institutions":[{"id":"https://openalex.org/I4210100046","display_name":"Integra (United States)","ror":"https://ror.org/00ynqbp15","country_code":"US","type":"company","lineage":["https://openalex.org/I4210100046"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"I. Minca","raw_affiliation_strings":["LSI Design and Integration Corporation, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"LSI Design and Integration Corporation, USA","institution_ids":["https://openalex.org/I4210100046"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5072602284","display_name":"Octavian Fratu","orcid":"https://orcid.org/0000-0001-5679-9307"},"institutions":[{"id":"https://openalex.org/I4210100046","display_name":"Integra (United States)","ror":"https://ror.org/00ynqbp15","country_code":"US","type":"company","lineage":["https://openalex.org/I4210100046"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"O. Fratu","raw_affiliation_strings":["LSI Design and Integration Corporation, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"LSI Design and Integration Corporation, USA","institution_ids":["https://openalex.org/I4210100046"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I4210100046"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.07057669,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"2","issue":null,"first_page":"501","last_page":"504"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.994700014591217,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.994700014591217,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9495000243186951,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9413999915122986,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/mixed-signal-integrated-circuit","display_name":"Mixed-signal integrated circuit","score":0.6529313325881958},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.650189220905304},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.6259410381317139},{"id":"https://openalex.org/keywords/block-diagram","display_name":"Block diagram","score":0.5905956625938416},{"id":"https://openalex.org/keywords/electronics","display_name":"Electronics","score":0.588902473449707},{"id":"https://openalex.org/keywords/signal","display_name":"SIGNAL (programming language)","score":0.562300443649292},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5516272783279419},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.5411607027053833},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.5388734936714172},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5108163356781006},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4087076783180237},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.3706826865673065},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.35769087076187134},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.24035856127738953},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2374694049358368},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.099511057138443}],"concepts":[{"id":"https://openalex.org/C62907940","wikidata":"https://www.wikidata.org/wiki/Q1541329","display_name":"Mixed-signal integrated circuit","level":3,"score":0.6529313325881958},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.650189220905304},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.6259410381317139},{"id":"https://openalex.org/C149227320","wikidata":"https://www.wikidata.org/wiki/Q884718","display_name":"Block diagram","level":2,"score":0.5905956625938416},{"id":"https://openalex.org/C138331895","wikidata":"https://www.wikidata.org/wiki/Q11650","display_name":"Electronics","level":2,"score":0.588902473449707},{"id":"https://openalex.org/C2779843651","wikidata":"https://www.wikidata.org/wiki/Q7390335","display_name":"SIGNAL (programming language)","level":2,"score":0.562300443649292},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5516272783279419},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.5411607027053833},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.5388734936714172},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5108163356781006},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4087076783180237},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.3706826865673065},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.35769087076187134},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.24035856127738953},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2374694049358368},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.099511057138443},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icecs.2002.1046207","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.2002.1046207","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"9th International Conference on Electronics, Circuits and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.6499999761581421,"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":2,"referenced_works":["https://openalex.org/W2120178011","https://openalex.org/W2177881412"],"related_works":["https://openalex.org/W2031235560","https://openalex.org/W2161335888","https://openalex.org/W2114773158","https://openalex.org/W2548106609","https://openalex.org/W1852277090","https://openalex.org/W1957521530","https://openalex.org/W2125423773","https://openalex.org/W1607309093","https://openalex.org/W2266281062","https://openalex.org/W2170610805"],"abstract_inverted_index":{"This":[0,29],"paper":[1,61],"presents":[2,62],"an":[3],"innovative":[4],"solution":[5,30],"of":[6,20,50,78],"a":[7,12,21,26,76],"mixed":[8],"signal":[9],"system":[10],"on":[11],"chip":[13],"that":[14],"integrates":[15],"all":[16],"the":[17,46,55,63,67],"electronic":[18],"blocks":[19,69],"hard":[22,56],"disk":[23,57],"drive":[24,58],"in":[25],"single":[27],"chip.":[28],"has":[31],"been":[32],"entirely":[33],"designed,":[34],"implemented":[35],"and":[36,41,66,71,82],"tested":[37],"by":[38],"LSI":[39],"Design":[40],"Integration":[42],"Corporation":[43],"(LDIC),":[44],"being":[45],"first":[47],"integrated":[48],"circuit":[49],"this":[51],"complexity":[52],"designated":[53],"for":[54],"industry.":[59],"The":[60],"block":[64],"diagram":[65],"key":[68],"parameters":[70],"features,":[72],"as":[73,75],"well":[74],"number":[77],"conclusions":[79],"regarding":[80],"implementation":[81],"testing":[83],"issues.":[84]},"counts_by_year":[],"updated_date":"2026-06-26T08:34:08.712188","created_date":"2025-10-10T00:00:00"}