{"id":"https://openalex.org/W1832101267","doi":"https://doi.org/10.1109/icecs.1999.812340","title":"Current mode baseband interface for communication applications","display_name":"Current mode baseband interface for communication applications","publication_year":2003,"publication_date":"2003-01-20","ids":{"openalex":"https://openalex.org/W1832101267","doi":"https://doi.org/10.1109/icecs.1999.812340","mag":"1832101267"},"language":"en","primary_location":{"id":"doi:10.1109/icecs.1999.812340","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.1999.812340","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ICECS'99. Proceedings of ICECS '99. 6th IEEE International Conference on Electronics, Circuits and Systems (Cat. No.99EX357)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"http://doi.org/10.1109/ICECS.1999.812340","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5047120909","display_name":"S. Bouras","orcid":null},"institutions":[{"id":"https://openalex.org/I174458059","display_name":"National Technical University of Athens","ror":"https://ror.org/03cx6bg69","country_code":"GR","type":"education","lineage":["https://openalex.org/I174458059"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"S. Bouras","raw_affiliation_strings":["Microelectronic Circuit Design Group, National and Technical University of Athens, Athens, Greece"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Microelectronic Circuit Design Group, National and Technical University of Athens, Athens, Greece","institution_ids":["https://openalex.org/I174458059"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5086315405","display_name":"T. Georgantas","orcid":null},"institutions":[{"id":"https://openalex.org/I174458059","display_name":"National Technical University of Athens","ror":"https://ror.org/03cx6bg69","country_code":"GR","type":"education","lineage":["https://openalex.org/I174458059"]},{"id":"https://openalex.org/I86100027","display_name":"Intracom Telecom (Greece)","ror":"https://ror.org/04npy5k94","country_code":"GR","type":"company","lineage":["https://openalex.org/I86100027"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"T. Georgantas","raw_affiliation_strings":["Intracom S.A., Paiania, Greece","Microelectronic Circuit Design Group, National and Technical University of Athens, Athens, Greece"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intracom S.A., Paiania, Greece","institution_ids":["https://openalex.org/I86100027"]},{"raw_affiliation_string":"Microelectronic Circuit Design Group, National and Technical University of Athens, Athens, Greece","institution_ids":["https://openalex.org/I174458059"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5033150511","display_name":"Y. Papananos","orcid":null},"institutions":[{"id":"https://openalex.org/I174458059","display_name":"National Technical University of Athens","ror":"https://ror.org/03cx6bg69","country_code":"GR","type":"education","lineage":["https://openalex.org/I174458059"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Y. Papananos","raw_affiliation_strings":["Microelectronic Circuit Design Group, National and Technical University of Athens, Athens, Greece"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Microelectronic Circuit Design Group, National and Technical University of Athens, Athens, Greece","institution_ids":["https://openalex.org/I174458059"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5052883989","display_name":"D. Dervenis","orcid":null},"institutions":[{"id":"https://openalex.org/I86100027","display_name":"Intracom Telecom (Greece)","ror":"https://ror.org/04npy5k94","country_code":"GR","type":"company","lineage":["https://openalex.org/I86100027"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"D. Dervenis","raw_affiliation_strings":["Intracom S.A., Paiania, Greece"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Intracom S.A., Paiania, Greece","institution_ids":["https://openalex.org/I86100027"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.6005,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.62761271,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"1","issue":null,"first_page":"533","last_page":"536"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/baseband","display_name":"Baseband","score":0.9100256562232971},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.697577953338623},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6523865461349487},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.6051753163337708},{"id":"https://openalex.org/keywords/transceiver","display_name":"Transceiver","score":0.6051251888275146},{"id":"https://openalex.org/keywords/converters","display_name":"Converters","score":0.5597051382064819},{"id":"https://openalex.org/keywords/mode","display_name":"Mode (computer interface)","score":0.5229238271713257},{"id":"https://openalex.org/keywords/context","display_name":"Context (archaeology)","score":0.5021250247955322},{"id":"https://openalex.org/keywords/interface","display_name":"Interface (matter)","score":0.46467193961143494},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.43418458104133606},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.3786199688911438},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.28257864713668823}],"concepts":[{"id":"https://openalex.org/C65165936","wikidata":"https://www.wikidata.org/wiki/Q575784","display_name":"Baseband","level":3,"score":0.9100256562232971},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.697577953338623},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6523865461349487},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.6051753163337708},{"id":"https://openalex.org/C7720470","wikidata":"https://www.wikidata.org/wiki/Q954187","display_name":"Transceiver","level":3,"score":0.6051251888275146},{"id":"https://openalex.org/C2778422915","wikidata":"https://www.wikidata.org/wiki/Q10302051","display_name":"Converters","level":3,"score":0.5597051382064819},{"id":"https://openalex.org/C48677424","wikidata":"https://www.wikidata.org/wiki/Q6888088","display_name":"Mode (computer interface)","level":2,"score":0.5229238271713257},{"id":"https://openalex.org/C2779343474","wikidata":"https://www.wikidata.org/wiki/Q3109175","display_name":"Context (archaeology)","level":2,"score":0.5021250247955322},{"id":"https://openalex.org/C113843644","wikidata":"https://www.wikidata.org/wiki/Q901882","display_name":"Interface (matter)","level":4,"score":0.46467193961143494},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.43418458104133606},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.3786199688911438},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.28257864713668823},{"id":"https://openalex.org/C129307140","wikidata":"https://www.wikidata.org/wiki/Q6795880","display_name":"Maximum bubble pressure method","level":3,"score":0.0},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C157915830","wikidata":"https://www.wikidata.org/wiki/Q2928001","display_name":"Bubble","level":2,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/icecs.1999.812340","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icecs.1999.812340","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ICECS'99. Proceedings of ICECS '99. 6th IEEE International Conference on Electronics, Circuits and Systems (Cat. No.99EX357)","raw_type":"proceedings-article"},{"id":"pmh:oai:dspace.lib.ntua.gr:123456789/25357","is_oa":true,"landing_page_url":"http://doi.org/10.1109/ICECS.1999.812340","pdf_url":null,"source":{"id":"https://openalex.org/S4377196837","display_name":"DSpace - NTUA (National Technical University of Athens)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I174458059","host_organization_name":"National Technical University of Athens","host_organization_lineage":["https://openalex.org/I174458059"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Sealing Technology","raw_type":"info:eu-repo/semantics/article"}],"best_oa_location":{"id":"pmh:oai:dspace.lib.ntua.gr:123456789/25357","is_oa":true,"landing_page_url":"http://doi.org/10.1109/ICECS.1999.812340","pdf_url":null,"source":{"id":"https://openalex.org/S4377196837","display_name":"DSpace - NTUA (National Technical University of Athens)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I174458059","host_organization_name":"National Technical University of Athens","host_organization_lineage":["https://openalex.org/I174458059"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Sealing Technology","raw_type":"info:eu-repo/semantics/article"},"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.4099999964237213,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1550244639","https://openalex.org/W1603549553","https://openalex.org/W1955770151","https://openalex.org/W1981230256","https://openalex.org/W2004277449","https://openalex.org/W2098385846","https://openalex.org/W2105350683","https://openalex.org/W2110923973","https://openalex.org/W2135433397","https://openalex.org/W2140823559","https://openalex.org/W2561492983"],"related_works":["https://openalex.org/W2204547643","https://openalex.org/W1497578837","https://openalex.org/W4294892273","https://openalex.org/W4293208944","https://openalex.org/W2355697382","https://openalex.org/W4249165909","https://openalex.org/W2783437851","https://openalex.org/W2136659592","https://openalex.org/W2115569193","https://openalex.org/W2161127017"],"abstract_inverted_index":{"This":[0],"paper":[1],"describes":[2],"part":[3],"of":[4,14,24,33,48,89],"the":[5,12,15,25,31,46,65,75,87],"work":[6],"that":[7],"has":[8,79],"been":[9,80],"performed":[10],"in":[11,51,61,72],"context":[13],"ESPRIT":[16],"IV":[17],"project":[18,27],"25702":[19],"I-MODE.":[20],"The":[21],"main":[22],"objective":[23],"I-MODE":[26],"is":[28],"to":[29,63],"evaluate":[30],"implementation":[32],"analog":[34],"baseband":[35],"building":[36],"blocks,":[37],"such":[38],"as":[39,82],"data":[40],"converters":[41],"and":[42],"filters,":[43],"necessary":[44],"for":[45,70,86],"integration":[47],"multi-mode":[49],"transceivers":[50],"a":[52,83],"low":[53,66],"cost":[54],"digital":[55],"3.3":[56],"V":[57],"CMOS":[58],"technology.":[59],"Furthermore,":[60],"order":[62],"achieve":[64],"voltage":[67],"operation":[68],"required":[69],"use":[71],"handheld":[73],"equipment,":[74],"current":[76],"mode":[77],"approach":[78],"chosen":[81],"promising":[84],"technique":[85],"design":[88],"these":[90],"blocks.":[91]},"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
