{"id":"https://openalex.org/W2108246510","doi":"https://doi.org/10.1109/icdcsw.2004.1284127","title":"Hardware-software co-design of resource constrained systems on a chip","display_name":"Hardware-software co-design of resource constrained systems on a chip","publication_year":2004,"publication_date":"2004-01-01","ids":{"openalex":"https://openalex.org/W2108246510","doi":"https://doi.org/10.1109/icdcsw.2004.1284127","mag":"2108246510"},"language":"en","primary_location":{"id":"doi:10.1109/icdcsw.2004.1284127","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icdcsw.2004.1284127","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"24th International Conference on Distributed Computing Systems Workshops, 2004. Proceedings.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5073213552","display_name":"N. Thepayasuwan","orcid":null},"institutions":[{"id":"https://openalex.org/I63190737","display_name":"University at Buffalo, State University of New York","ror":"https://ror.org/01y64my43","country_code":"US","type":"education","lineage":["https://openalex.org/I63190737"]},{"id":"https://openalex.org/I1327163397","display_name":"State University of New York","ror":"https://ror.org/01q1z8k08","country_code":"US","type":"education","lineage":["https://openalex.org/I1327163397"]},{"id":"https://openalex.org/I59553526","display_name":"Stony Brook University","ror":"https://ror.org/05qghxh33","country_code":"US","type":"education","lineage":["https://openalex.org/I59553526"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"N. Thepayasuwan","raw_affiliation_strings":["Department of Electrical and Computer Engineering, State University of New York, Stony Brook, Stony Brook, NY, USA","Dept. of Electr. & Comput. Eng., State univ. of New York, Buffalo, NY, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, State University of New York, Stony Brook, Stony Brook, NY, USA","institution_ids":["https://openalex.org/I59553526","https://openalex.org/I1327163397"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., State univ. of New York, Buffalo, NY, USA","institution_ids":["https://openalex.org/I63190737"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5080972445","display_name":"Alex Doboli","orcid":"https://orcid.org/0000-0003-2472-4014"},"institutions":[{"id":"https://openalex.org/I63190737","display_name":"University at Buffalo, State University of New York","ror":"https://ror.org/01y64my43","country_code":"US","type":"education","lineage":["https://openalex.org/I63190737"]},{"id":"https://openalex.org/I59553526","display_name":"Stony Brook University","ror":"https://ror.org/05qghxh33","country_code":"US","type":"education","lineage":["https://openalex.org/I59553526"]},{"id":"https://openalex.org/I1327163397","display_name":"State University of New York","ror":"https://ror.org/01q1z8k08","country_code":"US","type":"education","lineage":["https://openalex.org/I1327163397"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"A. Doboli","raw_affiliation_strings":["Department of Electrical and Computer Engineering, State University of New York, Stony Brook, Stony Brook, NY, USA","Dept. of Electr. & Comput. Eng., State univ. of New York, Buffalo, NY, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, State University of New York, Stony Brook, Stony Brook, NY, USA","institution_ids":["https://openalex.org/I59553526","https://openalex.org/I1327163397"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., State univ. of New York, Buffalo, NY, USA","institution_ids":["https://openalex.org/I63190737"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5073213552"],"corresponding_institution_ids":["https://openalex.org/I1327163397","https://openalex.org/I59553526","https://openalex.org/I63190737"],"apc_list":null,"apc_paid":null,"fwci":0.5266,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.66410022,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"818","last_page":"823"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7898968458175659},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.7282838821411133},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5689617395401001},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5650477409362793},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.537579357624054},{"id":"https://openalex.org/keywords/novelty","display_name":"Novelty","score":0.535089910030365},{"id":"https://openalex.org/keywords/resource","display_name":"Resource (disambiguation)","score":0.5115302801132202},{"id":"https://openalex.org/keywords/shared-resource","display_name":"Shared resource","score":0.5095858573913574},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.5079494118690491},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.4792347252368927},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.45173296332359314},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.443571001291275},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.41836225986480713},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.34772568941116333},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.3367341458797455},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.2233739197254181},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.14069190621376038},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.11416980624198914}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7898968458175659},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.7282838821411133},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5689617395401001},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5650477409362793},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.537579357624054},{"id":"https://openalex.org/C2778738651","wikidata":"https://www.wikidata.org/wiki/Q16546687","display_name":"Novelty","level":2,"score":0.535089910030365},{"id":"https://openalex.org/C206345919","wikidata":"https://www.wikidata.org/wiki/Q20380951","display_name":"Resource (disambiguation)","level":2,"score":0.5115302801132202},{"id":"https://openalex.org/C51332947","wikidata":"https://www.wikidata.org/wiki/Q1172305","display_name":"Shared resource","level":2,"score":0.5095858573913574},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.5079494118690491},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.4792347252368927},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.45173296332359314},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.443571001291275},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.41836225986480713},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.34772568941116333},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.3367341458797455},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.2233739197254181},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.14069190621376038},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.11416980624198914},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C27206212","wikidata":"https://www.wikidata.org/wiki/Q34178","display_name":"Theology","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icdcsw.2004.1284127","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icdcsw.2004.1284127","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"24th International Conference on Distributed Computing Systems Workshops, 2004. Proceedings.","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W1495162277","https://openalex.org/W1532943114","https://openalex.org/W2053415041","https://openalex.org/W2079144805","https://openalex.org/W2109672397","https://openalex.org/W2116493640","https://openalex.org/W2126413277","https://openalex.org/W2128335669","https://openalex.org/W2151415616","https://openalex.org/W2151888078","https://openalex.org/W2163014826","https://openalex.org/W2164500517","https://openalex.org/W4243939497","https://openalex.org/W6632027793"],"related_works":["https://openalex.org/W2058965144","https://openalex.org/W2164382479","https://openalex.org/W98480971","https://openalex.org/W2150291671","https://openalex.org/W2027972911","https://openalex.org/W2064431979","https://openalex.org/W2196541947","https://openalex.org/W1972821547","https://openalex.org/W4233035441","https://openalex.org/W4388674560"],"abstract_inverted_index":{"We":[0,72],"present":[1],"a":[2,12,81],"hardware-software":[3],"codesign":[4,78],"methodology":[5,20,54],"for":[6,33,45,64,75],"resource":[7,60],"constrained":[8],"SoC":[9],"fabricated":[10],"in":[11,22],"deep":[13],"submicron":[14],"process.":[15],"The":[16,36,53],"novelty":[17],"of":[18,38,70],"the":[19,76],"consists":[21],"contemplating":[23],"critical":[24],"hardware":[25],"and":[26,41,49,57],"layout":[27],"aspects":[28],"during":[29],"system":[30],"level":[31],"design":[32],"latency":[34],"optimization.":[35],"effect":[37],"interconnect":[39],"parasitic":[40],"delays":[42],"is":[43],"considered":[44],"characterizing":[46],"bus":[47],"speed":[48],"data":[50],"communication":[51],"times.":[52],"permits":[55],"coarse":[56],"medium":[58],"grained":[59],"sharing":[61],"across":[62],"tasks":[63],"execution":[65],"speedup":[66],"through":[67],"superior":[68],"usage":[69],"hardware.":[71],"offer":[73],"experiments":[74],"proposed":[77],"methodology,":[79],"including":[80],"JPEG":[82],"SoC.":[83]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
