{"id":"https://openalex.org/W4360996352","doi":"https://doi.org/10.1109/icct56141.2022.10072813","title":"A Block Assembly Tool for Design Automation of FPGA Implementations","display_name":"A Block Assembly Tool for Design Automation of FPGA Implementations","publication_year":2022,"publication_date":"2022-11-11","ids":{"openalex":"https://openalex.org/W4360996352","doi":"https://doi.org/10.1109/icct56141.2022.10072813"},"language":"en","primary_location":{"id":"doi:10.1109/icct56141.2022.10072813","is_oa":false,"landing_page_url":"http://dx.doi.org/10.1109/icct56141.2022.10072813","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 IEEE 22nd International Conference on Communication Technology (ICCT)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101766622","display_name":"Ke Du","orcid":"https://orcid.org/0000-0002-1560-4902"},"institutions":[{"id":"https://openalex.org/I161716053","display_name":"China Pharmaceutical University","ror":"https://ror.org/01sfm2718","country_code":"CN","type":"education","lineage":["https://openalex.org/I161716053"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Ke Du","raw_affiliation_strings":["School of Science, China Pharmaceutical University,Nanjing,China,211198"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Science, China Pharmaceutical University,Nanjing,China,211198","institution_ids":["https://openalex.org/I161716053"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5075837738","display_name":"St\u00e9phane Domas","orcid":null},"institutions":[{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"government","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I2802759292","display_name":"Franche-Comt\u00e9 \u00c9lectronique M\u00e9canique Thermique et Optique - Sciences et Technologies","ror":"https://ror.org/004fmxv66","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I2802759292","https://openalex.org/I37553959","https://openalex.org/I4210095849","https://openalex.org/I4405256580","https://openalex.org/I53262699"]},{"id":"https://openalex.org/I4210118524","display_name":"Universit\u00e9 Bourgogne Franche-Comt\u00e9","ror":"https://ror.org/02dn7x778","country_code":"FR","type":"education","lineage":["https://openalex.org/I4210118524"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"St\u00e9phane Domas","raw_affiliation_strings":["FEMTO-ST Institute, CNRS UMR 6174, Univ. Bourgogne Franche-Comt&#x00E9;,Belfort,France,90000"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"FEMTO-ST Institute, CNRS UMR 6174, Univ. Bourgogne Franche-Comt&#x00E9;,Belfort,France,90000","institution_ids":["https://openalex.org/I2802759292","https://openalex.org/I4210118524","https://openalex.org/I1294671590"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5051310986","display_name":"Michel Lenczner","orcid":"https://orcid.org/0000-0002-6761-9516"},"institutions":[{"id":"https://openalex.org/I1294671590","display_name":"Centre National de la Recherche Scientifique","ror":"https://ror.org/02feahw73","country_code":"FR","type":"government","lineage":["https://openalex.org/I1294671590"]},{"id":"https://openalex.org/I2802759292","display_name":"Franche-Comt\u00e9 \u00c9lectronique M\u00e9canique Thermique et Optique - Sciences et Technologies","ror":"https://ror.org/004fmxv66","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I2802759292","https://openalex.org/I37553959","https://openalex.org/I4210095849","https://openalex.org/I4405256580","https://openalex.org/I53262699"]},{"id":"https://openalex.org/I4210118524","display_name":"Universit\u00e9 Bourgogne Franche-Comt\u00e9","ror":"https://ror.org/02dn7x778","country_code":"FR","type":"education","lineage":["https://openalex.org/I4210118524"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Michel Lenczner","raw_affiliation_strings":["FEMTO-ST Institute, CNRS UMR 6174, Univ. Bourgogne Franche-Comt&#x00E9;,Belfort,France,90000"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"FEMTO-ST Institute, CNRS UMR 6174, Univ. Bourgogne Franche-Comt&#x00E9;,Belfort,France,90000","institution_ids":["https://openalex.org/I2802759292","https://openalex.org/I4210118524","https://openalex.org/I1294671590"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.19874552,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1541","last_page":"1545"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/correctness","display_name":"Correctness","score":0.801267147064209},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7678115963935852},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7464488744735718},{"id":"https://openalex.org/keywords/automation","display_name":"Automation","score":0.7329830527305603},{"id":"https://openalex.org/keywords/vhdl","display_name":"VHDL","score":0.7050975561141968},{"id":"https://openalex.org/keywords/electronic-design-automation","display_name":"Electronic design automation","score":0.662857174873352},{"id":"https://openalex.org/keywords/implementation","display_name":"Implementation","score":0.5565798878669739},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.5525321364402771},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5292457938194275},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4833957254886627},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.45193493366241455},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.34206312894821167},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.11974528431892395}],"concepts":[{"id":"https://openalex.org/C55439883","wikidata":"https://www.wikidata.org/wiki/Q360812","display_name":"Correctness","level":2,"score":0.801267147064209},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7678115963935852},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7464488744735718},{"id":"https://openalex.org/C115901376","wikidata":"https://www.wikidata.org/wiki/Q184199","display_name":"Automation","level":2,"score":0.7329830527305603},{"id":"https://openalex.org/C36941000","wikidata":"https://www.wikidata.org/wiki/Q209455","display_name":"VHDL","level":3,"score":0.7050975561141968},{"id":"https://openalex.org/C64260653","wikidata":"https://www.wikidata.org/wiki/Q1194864","display_name":"Electronic design automation","level":2,"score":0.662857174873352},{"id":"https://openalex.org/C26713055","wikidata":"https://www.wikidata.org/wiki/Q245962","display_name":"Implementation","level":2,"score":0.5565798878669739},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.5525321364402771},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5292457938194275},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4833957254886627},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.45193493366241455},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.34206312894821167},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.11974528431892395},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icct56141.2022.10072813","is_oa":false,"landing_page_url":"http://dx.doi.org/10.1109/icct56141.2022.10072813","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 IEEE 22nd International Conference on Communication Technology (ICCT)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.6200000047683716,"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9"}],"awards":[{"id":"https://openalex.org/G4689149281","display_name":null,"funder_award_id":"2632022FY03","funder_id":"https://openalex.org/F4320335787","funder_display_name":"Fundamental Research Funds for the Central Universities"}],"funders":[{"id":"https://openalex.org/F4320335787","display_name":"Fundamental Research Funds for the Central Universities","ror":null}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W2051677156","https://openalex.org/W2123407602","https://openalex.org/W2798273149","https://openalex.org/W2914867373","https://openalex.org/W3105917774","https://openalex.org/W3125311319","https://openalex.org/W3125322563","https://openalex.org/W3133276302"],"related_works":["https://openalex.org/W3004362061","https://openalex.org/W2364622490","https://openalex.org/W2772436979","https://openalex.org/W2042515040","https://openalex.org/W2383986884","https://openalex.org/W2356141508","https://openalex.org/W4297665406","https://openalex.org/W2749962643","https://openalex.org/W2390807153","https://openalex.org/W2384838054"],"abstract_inverted_index":{"Since":[0],"the":[1,17,43,79,93,111],"appearance":[2],"of":[3,12,19,27,45],"hardware,":[4],"there":[5],"has":[6],"always":[7],"been":[8],"a":[9,24],"serious":[10],"shortage":[11],"skilled":[13],"designers,":[14],"especially":[15],"with":[16,64],"emergence":[18],"FPGAs":[20],"that":[21,54],"resulted":[22],"in":[23,110],"fast":[25],"rising":[26],"project":[28],"sizes.":[29],"Therefore,":[30],"it":[31,74],"needs":[32],"to":[33,58,76,91],"investigate":[34],"easier":[35],"solutions":[36],"for":[37,71,83,104,117,120],"hardware":[38],"programming.":[39],"This":[40,95],"paper":[41],"presents":[42],"details":[44],"an":[46],"EDA":[47],"tool":[48],"called":[49],"BlAsT":[50,114],"(Block":[51],"Assembly":[52],"Tool)":[53],"allows":[55,75],"non-expert":[56],"users":[57],"generate":[59],"VHDL":[60],"code":[61],"automatically,":[62],"compliant":[63],"real":[65],"target":[66],"architecture":[67],"and":[68,87,100],"not":[69],"only":[70],"simulations.":[72],"Moreover,":[73],"check":[77],"whether":[78],"result":[80],"is":[81],"correct":[82],"given":[84],"input":[85],"streams":[86],"give":[88],"necessary":[89],"modifications":[90],"ensure":[92],"correctness.":[94],"process":[96],"involves":[97],"pattern":[98],"checking":[99],"graph":[101],"modification":[102],"algorithms":[103],"FPGA":[105,121],"design":[106,118],"automation.":[107],"As":[108],"shown":[109],"example":[112],"case,":[113],"performs":[115],"well":[116],"automation":[119],"architectures.":[122]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
