{"id":"https://openalex.org/W4294069444","doi":"https://doi.org/10.1109/icce-taiwan55306.2022.9869117","title":"Design of Multicore Dataflow DSPs with Different Loop Iteration Mechanisms","display_name":"Design of Multicore Dataflow DSPs with Different Loop Iteration Mechanisms","publication_year":2022,"publication_date":"2022-07-06","ids":{"openalex":"https://openalex.org/W4294069444","doi":"https://doi.org/10.1109/icce-taiwan55306.2022.9869117"},"language":"en","primary_location":{"id":"doi:10.1109/icce-taiwan55306.2022.9869117","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icce-taiwan55306.2022.9869117","pdf_url":null,"source":{"id":"https://openalex.org/S4363607852","display_name":"2022 IEEE International Conference on Consumer Electronics - Taiwan","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 IEEE International Conference on Consumer Electronics - Taiwan","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5034328048","display_name":"Shun Orita","orcid":null},"institutions":[{"id":"https://openalex.org/I146516829","display_name":"Hirosaki University","ror":"https://ror.org/02syg0q74","country_code":"JP","type":"education","lineage":["https://openalex.org/I146516829"]}],"countries":["JP"],"is_corresponding":true,"raw_author_name":"Shun Orita","raw_affiliation_strings":["Graduate School of Science and Technology, Hirosaki University,Japan","Graduate School of Science and Technology, Hirosaki University, Japan"],"affiliations":[{"raw_affiliation_string":"Graduate School of Science and Technology, Hirosaki University,Japan","institution_ids":["https://openalex.org/I146516829"]},{"raw_affiliation_string":"Graduate School of Science and Technology, Hirosaki University, Japan","institution_ids":["https://openalex.org/I146516829"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5019105668","display_name":"Akiko Narita","orcid":null},"institutions":[{"id":"https://openalex.org/I146516829","display_name":"Hirosaki University","ror":"https://ror.org/02syg0q74","country_code":"JP","type":"education","lineage":["https://openalex.org/I146516829"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Akiko Narita","raw_affiliation_strings":["Graduate School of Science and Technology, Hirosaki University,Japan","Graduate School of Science and Technology, Hirosaki University, Japan"],"affiliations":[{"raw_affiliation_string":"Graduate School of Science and Technology, Hirosaki University,Japan","institution_ids":["https://openalex.org/I146516829"]},{"raw_affiliation_string":"Graduate School of Science and Technology, Hirosaki University, Japan","institution_ids":["https://openalex.org/I146516829"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5064689491","display_name":"Kenji Ichijo","orcid":null},"institutions":[{"id":"https://openalex.org/I146516829","display_name":"Hirosaki University","ror":"https://ror.org/02syg0q74","country_code":"JP","type":"education","lineage":["https://openalex.org/I146516829"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Kenji Ichijo","raw_affiliation_strings":["Graduate School of Science and Technology, Hirosaki University,Japan","Graduate School of Science and Technology, Hirosaki University, Japan"],"affiliations":[{"raw_affiliation_string":"Graduate School of Science and Technology, Hirosaki University,Japan","institution_ids":["https://openalex.org/I146516829"]},{"raw_affiliation_string":"Graduate School of Science and Technology, Hirosaki University, Japan","institution_ids":["https://openalex.org/I146516829"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5034328048"],"corresponding_institution_ids":["https://openalex.org/I146516829"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.09807887,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"109","last_page":"110"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12810","display_name":"Real-time simulation and control systems","score":0.9970999956130981,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/dataflow","display_name":"Dataflow","score":0.9773213863372803},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8097875118255615},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.745216965675354},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.7065334320068359},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.6296883225440979},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5270899534225464},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.44998806715011597},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4360061287879944},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.28902649879455566}],"concepts":[{"id":"https://openalex.org/C96324660","wikidata":"https://www.wikidata.org/wiki/Q205446","display_name":"Dataflow","level":2,"score":0.9773213863372803},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8097875118255615},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.745216965675354},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.7065334320068359},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.6296883225440979},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5270899534225464},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.44998806715011597},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4360061287879944},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.28902649879455566}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icce-taiwan55306.2022.9869117","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icce-taiwan55306.2022.9869117","pdf_url":null,"source":{"id":"https://openalex.org/S4363607852","display_name":"2022 IEEE International Conference on Consumer Electronics - Taiwan","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 IEEE International Conference on Consumer Electronics - Taiwan","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.5099999904632568,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":3,"referenced_works":["https://openalex.org/W1575587658","https://openalex.org/W2171532807","https://openalex.org/W2506613744"],"related_works":["https://openalex.org/W2999668243","https://openalex.org/W1876592433","https://openalex.org/W2083269738","https://openalex.org/W1980880153","https://openalex.org/W1998888015","https://openalex.org/W1967938402","https://openalex.org/W2386041993","https://openalex.org/W1608572506","https://openalex.org/W3023876411","https://openalex.org/W123152114"],"abstract_inverted_index":{"FPGA":[0,70],"technology":[1],"and":[2,18,71],"dataflow":[3,22,43],"approach":[4,23],"offer":[5],"the":[6,26,73],"potential":[7,27],"for":[8,28],"high":[9],"performance":[10],"in":[11],"many":[12],"applications":[13],"including":[14],"IoT-connected":[15],"consumer":[16],"electronics":[17],"so":[19],"on.":[20],"A":[21],"inherently":[24],"brings":[25],"parallel":[29],"execution":[30,74],"of":[31,59,76],"programs.":[32],"In":[33,48],"our":[34,66],"laboratory,":[35],"we":[36,51],"have":[37],"developed":[38],"a":[39,77],"ring":[40],"interconnected":[41],"multicore":[42],"DSP":[44],"called":[45],"LSC-Based":[46,53],"DSP.":[47],"this":[49],"work,":[50],"design":[52],"DSPs":[54,67],"with":[55],"two":[56],"different":[57],"kinds":[58],"loop":[60],"iteration":[61],"mechanisms.":[62],"We":[63],"implement":[64],"these":[65],"on":[68],"an":[69],"measure":[72],"time":[75],"test":[78],"program.":[79]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}