{"id":"https://openalex.org/W2284165571","doi":"https://doi.org/10.1109/icce-berlin.2015.7391262","title":"Small area VLSI architecture for deblocking filter of HEVC","display_name":"Small area VLSI architecture for deblocking filter of HEVC","publication_year":2015,"publication_date":"2015-09-01","ids":{"openalex":"https://openalex.org/W2284165571","doi":"https://doi.org/10.1109/icce-berlin.2015.7391262","mag":"2284165571"},"language":"en","primary_location":{"id":"doi:10.1109/icce-berlin.2015.7391262","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icce-berlin.2015.7391262","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE 5th International Conference on Consumer Electronics - Berlin (ICCE-Berlin)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5029941390","display_name":"Masashi Tomida","orcid":null},"institutions":[{"id":"https://openalex.org/I922474255","display_name":"Tokushima University","ror":"https://ror.org/044vy1d05","country_code":"JP","type":"education","lineage":["https://openalex.org/I922474255"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Masashi Tomida","raw_affiliation_strings":["Electrical and Electronic Engineering, Tokushima University, Tokushima City, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electrical and Electronic Engineering, Tokushima University, Tokushima City, Japan","institution_ids":["https://openalex.org/I922474255"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5002098124","display_name":"Yutaro Tanida","orcid":null},"institutions":[{"id":"https://openalex.org/I922474255","display_name":"Tokushima University","ror":"https://ror.org/044vy1d05","country_code":"JP","type":"education","lineage":["https://openalex.org/I922474255"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Yutaro Tanida","raw_affiliation_strings":["Electrical and Electronic Engineering, Tokushima University, Tokushima City, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electrical and Electronic Engineering, Tokushima University, Tokushima City, Japan","institution_ids":["https://openalex.org/I922474255"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102012853","display_name":"Tian Song","orcid":"https://orcid.org/0000-0003-4017-0074"},"institutions":[{"id":"https://openalex.org/I922474255","display_name":"Tokushima University","ror":"https://ror.org/044vy1d05","country_code":"JP","type":"education","lineage":["https://openalex.org/I922474255"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Tian Song","raw_affiliation_strings":["Computer Systems Engineering Institute of Technology and Science, The University of Tokushima, Tokushima, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Computer Systems Engineering Institute of Technology and Science, The University of Tokushima, Tokushima, Japan","institution_ids":["https://openalex.org/I922474255"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5101119528","display_name":"Takashi Shimamoto","orcid":null},"institutions":[{"id":"https://openalex.org/I922474255","display_name":"Tokushima University","ror":"https://ror.org/044vy1d05","country_code":"JP","type":"education","lineage":["https://openalex.org/I922474255"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Takashi Shimamoto","raw_affiliation_strings":["Computer Systems Engineering Institute of Technology and Science, The University of Tokushima, Tokushima, Japan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Computer Systems Engineering Institute of Technology and Science, The University of Tokushima, Tokushima, Japan","institution_ids":["https://openalex.org/I922474255"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I922474255"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"294","last_page":"297"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10741","display_name":"Video Coding and Compression Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10741","display_name":"Video Coding and Compression Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11165","display_name":"Image and Video Quality Assessment","score":0.9973999857902527,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10901","display_name":"Advanced Data Compression Techniques","score":0.9961000084877014,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/deblocking-filter","display_name":"Deblocking filter","score":0.7722593545913696},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.772153377532959},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7366335391998291},{"id":"https://openalex.org/keywords/pipeline","display_name":"Pipeline (software)","score":0.6825011968612671},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.6080887317657471},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.5553163290023804},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.5290055871009827},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4743460714817047},{"id":"https://openalex.org/keywords/clock-rate","display_name":"Clock rate","score":0.46731942892074585},{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.4666134715080261},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.43846654891967773},{"id":"https://openalex.org/keywords/filter","display_name":"Filter (signal processing)","score":0.43454495072364807},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.42154204845428467},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4164424538612366},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.3280203342437744},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.1653640866279602},{"id":"https://openalex.org/keywords/computer-vision","display_name":"Computer vision","score":0.11278188228607178}],"concepts":[{"id":"https://openalex.org/C143184774","wikidata":"https://www.wikidata.org/wiki/Q3020846","display_name":"Deblocking filter","level":2,"score":0.7722593545913696},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.772153377532959},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7366335391998291},{"id":"https://openalex.org/C43521106","wikidata":"https://www.wikidata.org/wiki/Q2165493","display_name":"Pipeline (software)","level":2,"score":0.6825011968612671},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.6080887317657471},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.5553163290023804},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.5290055871009827},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4743460714817047},{"id":"https://openalex.org/C178693496","wikidata":"https://www.wikidata.org/wiki/Q911691","display_name":"Clock rate","level":3,"score":0.46731942892074585},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.4666134715080261},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.43846654891967773},{"id":"https://openalex.org/C106131492","wikidata":"https://www.wikidata.org/wiki/Q3072260","display_name":"Filter (signal processing)","level":2,"score":0.43454495072364807},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.42154204845428467},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4164424538612366},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.3280203342437744},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.1653640866279602},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.11278188228607178},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.0},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icce-berlin.2015.7391262","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icce-berlin.2015.7391262","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE 5th International Conference on Consumer Electronics - Berlin (ICCE-Berlin)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":3,"referenced_works":["https://openalex.org/W1979935352","https://openalex.org/W2079460711","https://openalex.org/W2545266057"],"related_works":["https://openalex.org/W244738299","https://openalex.org/W2015155483","https://openalex.org/W2163915119","https://openalex.org/W1572837867","https://openalex.org/W2141748053","https://openalex.org/W3139997849","https://openalex.org/W2031051084","https://openalex.org/W1965676543","https://openalex.org/W2131495130","https://openalex.org/W1978053690"],"abstract_inverted_index":{"In":[0],"this":[1],"paper,":[2],"a":[3,28,82],"small":[4,20],"area":[5,59],"hardware":[6],"architecture":[7,35,56,66,76],"for":[8,81,89],"deblocking":[9],"filter":[10],"of":[11,61],"HEVC":[12],"is":[13,31,36],"proposed.":[14,32],"To":[15],"achieve":[16],"high":[17,92],"throughput":[18],"and":[19,85],"area,":[21],"an":[22,58],"efficient":[23],"processing":[24,88],"order":[25],"based":[26],"on":[27],"CTU-based":[29],"pipeline":[30],"The":[33,49],"proposed":[34,55,75],"synthesized":[37],"in":[38],"ALTERA":[39],"Cyclone":[40],"V":[41],"28nm":[42],"process":[43],"FPGA":[44],"with":[45,64,97],"28.7K":[46],"gate":[47],"counts.":[48],"simulation":[50],"result":[51],"shows":[52],"that":[53],"the":[54,65,74],"achieves":[57,86],"reduction":[60],"32%":[62],"compared":[63],"which":[67],"uses":[68,77],"similar":[69],"cross":[70],"unit.":[71],"About":[72],"throughput,":[73],"24":[78],"clock":[79],"cycles":[80],"16\u00d716":[83],"unit":[84],"real-time":[87],"quad":[90],"full":[91],"definition":[93],"(QFHD)":[94],"resolution":[95],"videos":[96],"60fps.":[98]},"counts_by_year":[{"year":2016,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}