{"id":"https://openalex.org/W2549803267","doi":"https://doi.org/10.1109/iccd.2016.7753284","title":"SRAM stability analysis for different cache configurations due to Bias Temperature Instability and Hot Carrier Injection","display_name":"SRAM stability analysis for different cache configurations due to Bias Temperature Instability and Hot Carrier Injection","publication_year":2016,"publication_date":"2016-10-01","ids":{"openalex":"https://openalex.org/W2549803267","doi":"https://doi.org/10.1109/iccd.2016.7753284","mag":"2549803267"},"language":"en","primary_location":{"id":"doi:10.1109/iccd.2016.7753284","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccd.2016.7753284","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 IEEE 34th International Conference on Computer Design (ICCD)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5014655929","display_name":"Taizhi Liu","orcid":"https://orcid.org/0000-0001-5057-4916"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Taizhi Liu","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5011064659","display_name":"Chang-Chih Chen","orcid":null},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Chang-Chih Chen","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101934751","display_name":"Jiadong Wu","orcid":"https://orcid.org/0000-0002-0626-4870"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jiadong Wu","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5032107826","display_name":"Linda Milor","orcid":"https://orcid.org/0000-0002-8244-4793"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Linda Milor","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA","institution_ids":["https://openalex.org/I130701444"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I130701444"],"apc_list":null,"apc_paid":null,"fwci":3.1621,"has_fulltext":false,"cited_by_count":22,"citation_normalized_percentile":{"value":0.92354466,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":null,"last_page":null},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.6888317465782166},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.658811628818512},{"id":"https://openalex.org/keywords/instability","display_name":"Instability","score":0.544829785823822},{"id":"https://openalex.org/keywords/negative-bias-temperature-instability","display_name":"Negative-bias temperature instability","score":0.5417563915252686},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.5235176682472229},{"id":"https://openalex.org/keywords/hot-carrier-injection","display_name":"Hot-carrier injection","score":0.47292783856391907},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4458485543727875},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.4248039126396179},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3606550693511963},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.29757940769195557},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.19154465198516846},{"id":"https://openalex.org/keywords/mosfet","display_name":"MOSFET","score":0.17093315720558167},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1696278154850006},{"id":"https://openalex.org/keywords/mechanics","display_name":"Mechanics","score":0.16365572810173035},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.16132527589797974},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.13543257117271423},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.13047417998313904}],"concepts":[{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.6888317465782166},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.658811628818512},{"id":"https://openalex.org/C207821765","wikidata":"https://www.wikidata.org/wiki/Q405372","display_name":"Instability","level":2,"score":0.544829785823822},{"id":"https://openalex.org/C557185","wikidata":"https://www.wikidata.org/wiki/Q6987194","display_name":"Negative-bias temperature instability","level":5,"score":0.5417563915252686},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.5235176682472229},{"id":"https://openalex.org/C73500089","wikidata":"https://www.wikidata.org/wiki/Q2445876","display_name":"Hot-carrier injection","level":4,"score":0.47292783856391907},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4458485543727875},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.4248039126396179},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3606550693511963},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.29757940769195557},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.19154465198516846},{"id":"https://openalex.org/C2778413303","wikidata":"https://www.wikidata.org/wiki/Q210793","display_name":"MOSFET","level":4,"score":0.17093315720558167},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1696278154850006},{"id":"https://openalex.org/C57879066","wikidata":"https://www.wikidata.org/wiki/Q41217","display_name":"Mechanics","level":1,"score":0.16365572810173035},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.16132527589797974},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.13543257117271423},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.13047417998313904}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iccd.2016.7753284","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccd.2016.7753284","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 IEEE 34th International Conference on Computer Design (ICCD)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":39,"referenced_works":["https://openalex.org/W761701182","https://openalex.org/W835874665","https://openalex.org/W1600856165","https://openalex.org/W1973454577","https://openalex.org/W1998810909","https://openalex.org/W2002612140","https://openalex.org/W2048816638","https://openalex.org/W2050077925","https://openalex.org/W2057843388","https://openalex.org/W2057925451","https://openalex.org/W2070706865","https://openalex.org/W2073613856","https://openalex.org/W2089307123","https://openalex.org/W2102209270","https://openalex.org/W2102785080","https://openalex.org/W2115016937","https://openalex.org/W2117043376","https://openalex.org/W2120353978","https://openalex.org/W2120466934","https://openalex.org/W2125515938","https://openalex.org/W2127763613","https://openalex.org/W2134869654","https://openalex.org/W2137706187","https://openalex.org/W2138577377","https://openalex.org/W2146787584","https://openalex.org/W2150424241","https://openalex.org/W2151857680","https://openalex.org/W2154451732","https://openalex.org/W2155105016","https://openalex.org/W2158520623","https://openalex.org/W2159087234","https://openalex.org/W2162752393","https://openalex.org/W2224475358","https://openalex.org/W2328978473","https://openalex.org/W2542745766","https://openalex.org/W3144243563","https://openalex.org/W3145727536","https://openalex.org/W4240146668","https://openalex.org/W6636014382"],"related_works":["https://openalex.org/W3150866391","https://openalex.org/W2112214579","https://openalex.org/W2310523918","https://openalex.org/W4200470254","https://openalex.org/W2120314645","https://openalex.org/W2082142229","https://openalex.org/W2184065029","https://openalex.org/W2126351224","https://openalex.org/W4386071739","https://openalex.org/W1983590135"],"abstract_inverted_index":{"Bias":[0],"Temperature":[1],"Instability":[2],"(BTI)":[3],"and":[4,21,49,68,83,101,122],"Hot":[5],"Carrier":[6],"Injections":[7],"(HCI)":[8],"are":[9,34,46,50],"two":[10,27],"of":[11,41,66,89,105,120],"the":[12,38,58,63,84,97,106,114],"main":[13],"effects":[14],"that":[15],"increase":[16],"a":[17,110,118],"transistor's":[18],"threshold":[19],"voltage":[20],"further":[22],"cause":[23],"performance":[24,102],"degradations.":[25],"These":[26],"wearout":[28],"mechanisms":[29],"affect":[30],"all":[31],"transistors,":[32],"but":[33],"especially":[35],"acute":[36],"in":[37,76],"SRAM":[39],"cells":[40],"first-level":[42],"(L1)":[43],"caches,":[44],"which":[45],"frequently":[47],"accessed":[48],"critical":[51],"for":[52,70,130],"microprocessor":[53],"performance.":[54],"This":[55],"work":[56],"studies":[57],"cache":[59,72,77,80,108,131],"lifetimes":[60],"due":[61],"to":[62],"combined":[64],"effect":[65,88],"BTI":[67],"HCI":[69],"different":[71],"configurations,":[73],"including":[74],"variation":[75],"size,":[78,82],"associativity,":[79],"line":[81],"replacement":[85],"algorithm.":[86],"The":[87],"process":[90],"variations":[91],"is":[92,116],"also":[93],"considered.":[94],"We":[95],"analyze":[96],"reliability":[98],"(failure":[99],"probability)":[100],"(hit":[103],"rate)":[104],"L1":[107],"within":[109],"LEON3":[111,115],"microprocessor,":[112],"while":[113],"running":[117],"set":[119],"benchmarks,":[121],"we":[123],"provide":[124],"essential":[125],"insights":[126],"on":[127],"performance-reliability":[128],"tradeoffs":[129],"designers.":[132]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":5},{"year":2018,"cited_by_count":6},{"year":2017,"cited_by_count":6}],"updated_date":"2026-06-26T08:34:08.712188","created_date":"2025-10-10T00:00:00"}
