{"id":"https://openalex.org/W2550671729","doi":"https://doi.org/10.1109/iccd.2016.7753283","title":"Understanding and alleviating intra-die and intra-DIMM parameter variation in the memory system","display_name":"Understanding and alleviating intra-die and intra-DIMM parameter variation in the memory system","publication_year":2016,"publication_date":"2016-10-01","ids":{"openalex":"https://openalex.org/W2550671729","doi":"https://doi.org/10.1109/iccd.2016.7753283","mag":"2550671729"},"language":"en","primary_location":{"id":"doi:10.1109/iccd.2016.7753283","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccd.2016.7753283","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 IEEE 34th International Conference on Computer Design (ICCD)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5066764886","display_name":"Meysam Taassori","orcid":null},"institutions":[{"id":"https://openalex.org/I223532165","display_name":"University of Utah","ror":"https://ror.org/03r0ha626","country_code":"US","type":"education","lineage":["https://openalex.org/I223532165"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Meysam Taassori","raw_affiliation_strings":["University of Utah, UT, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Utah, UT, USA","institution_ids":["https://openalex.org/I223532165"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5067008084","display_name":"Ali Shafiee","orcid":"https://orcid.org/0000-0001-7154-9138"},"institutions":[{"id":"https://openalex.org/I223532165","display_name":"University of Utah","ror":"https://ror.org/03r0ha626","country_code":"US","type":"education","lineage":["https://openalex.org/I223532165"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ali Shafiee","raw_affiliation_strings":["University of Utah, UT, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Utah, UT, USA","institution_ids":["https://openalex.org/I223532165"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5087056095","display_name":"Rajeev Balasubramonian","orcid":"https://orcid.org/0009-0009-4093-5904"},"institutions":[{"id":"https://openalex.org/I223532165","display_name":"University of Utah","ror":"https://ror.org/03r0ha626","country_code":"US","type":"education","lineage":["https://openalex.org/I223532165"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Rajeev Balasubramonian","raw_affiliation_strings":["University of Utah, UT, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Utah, UT, USA","institution_ids":["https://openalex.org/I223532165"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I223532165"],"apc_list":null,"apc_paid":null,"fwci":0.6408,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.69300082,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"217","last_page":"224"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.8595730066299438},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7443486452102661},{"id":"https://openalex.org/keywords/memory-controller","display_name":"Memory controller","score":0.6671965718269348},{"id":"https://openalex.org/keywords/dynamic-random-access-memory","display_name":"Dynamic random-access memory","score":0.5079403519630432},{"id":"https://openalex.org/keywords/process-variation","display_name":"Process variation","score":0.4974530041217804},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.46756845712661743},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.44052544236183167},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.4323929250240326},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.41962265968322754},{"id":"https://openalex.org/keywords/controller","display_name":"Controller (irrigation)","score":0.41465649008750916},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.2708454430103302},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.1921004354953766},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.09364163875579834},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.08337414264678955}],"concepts":[{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.8595730066299438},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7443486452102661},{"id":"https://openalex.org/C100800780","wikidata":"https://www.wikidata.org/wiki/Q1175867","display_name":"Memory controller","level":3,"score":0.6671965718269348},{"id":"https://openalex.org/C118702147","wikidata":"https://www.wikidata.org/wiki/Q189396","display_name":"Dynamic random-access memory","level":3,"score":0.5079403519630432},{"id":"https://openalex.org/C93389723","wikidata":"https://www.wikidata.org/wiki/Q7247313","display_name":"Process variation","level":3,"score":0.4974530041217804},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.46756845712661743},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.44052544236183167},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.4323929250240326},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.41962265968322754},{"id":"https://openalex.org/C203479927","wikidata":"https://www.wikidata.org/wiki/Q5165939","display_name":"Controller (irrigation)","level":2,"score":0.41465649008750916},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.2708454430103302},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.1921004354953766},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.09364163875579834},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.08337414264678955},{"id":"https://openalex.org/C6557445","wikidata":"https://www.wikidata.org/wiki/Q173113","display_name":"Agronomy","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iccd.2016.7753283","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccd.2016.7753283","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 IEEE 34th International Conference on Computer Design (ICCD)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/10","display_name":"Reduced inequalities","score":0.7799999713897705}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":41,"referenced_works":["https://openalex.org/W1578894366","https://openalex.org/W1963998358","https://openalex.org/W1970426108","https://openalex.org/W1992487929","https://openalex.org/W1998385236","https://openalex.org/W2020460319","https://openalex.org/W2033982707","https://openalex.org/W2038212693","https://openalex.org/W2058539177","https://openalex.org/W2084661148","https://openalex.org/W2098040113","https://openalex.org/W2098736822","https://openalex.org/W2102449048","https://openalex.org/W2105102111","https://openalex.org/W2105963142","https://openalex.org/W2106342588","https://openalex.org/W2114260887","https://openalex.org/W2119092821","https://openalex.org/W2119435553","https://openalex.org/W2129513794","https://openalex.org/W2132455089","https://openalex.org/W2138436606","https://openalex.org/W2146018705","https://openalex.org/W2146743175","https://openalex.org/W2148952606","https://openalex.org/W2150283124","https://openalex.org/W2150401140","https://openalex.org/W2151917022","https://openalex.org/W2157210245","https://openalex.org/W2158620667","https://openalex.org/W2160980152","https://openalex.org/W2165816612","https://openalex.org/W2172221824","https://openalex.org/W2198389792","https://openalex.org/W4242980431","https://openalex.org/W4248825930","https://openalex.org/W4251181571","https://openalex.org/W4253150581","https://openalex.org/W6680280441","https://openalex.org/W6683227110","https://openalex.org/W6685274019"],"related_works":["https://openalex.org/W2518930778","https://openalex.org/W2979599569","https://openalex.org/W3015923041","https://openalex.org/W4221167253","https://openalex.org/W2165816612","https://openalex.org/W2912837441","https://openalex.org/W2080488045","https://openalex.org/W4287024926","https://openalex.org/W3193730902","https://openalex.org/W2100212269"],"abstract_inverted_index":{"Continued":[0],"process":[1],"scaling":[2],"must":[3],"overcome":[4,131],"several":[5],"manufacturing":[6,22],"challenges.":[7],"At":[8],"the":[9,54,127,137,148,152,162,181],"same":[10],"time,":[11],"industry":[12],"is":[13,85],"exploring":[14],"many":[15,39],"new":[16,21],"memory":[17,55,116,142,153,163],"technologies":[18],"that":[19,79,96,144,201],"require":[20],"processes.":[23],"In":[24,70,111],"such":[25],"challenging":[26],"fabrication":[27],"regimes,":[28],"parameter":[29],"variation":[30],"(PV)":[31],"and":[32,81,150,165,191,220],"yield":[33],"will":[34,119],"be":[35,121],"important":[36],"problems.":[37],"While":[38],"recent":[40],"bodies":[41],"of":[42,139,215],"work":[43],"have":[44,50,59,65],"targeted":[45,51],"PV":[46,52,80,84,99,146],"in":[47,53,90,147,217,222],"processors,":[48],"few":[49],"system.":[56],"Mitigation":[57],"techniques":[58],"either":[60],"focused":[61,66],"on":[62,67,169],"refresh,":[63],"or":[64,205],"inter-die":[68],"variation.":[69],"this":[71,97],"work,":[72],"with":[73],"empirical":[74],"measurements,":[75],"we":[76,135],"first":[77],"show":[78,95],"specifically":[82],"intra-die":[83,98],"indeed":[86],"a":[87,108,140,196],"real":[88],"phenomenon":[89],"modern":[91],"DRAM":[92,109,218],"chips.":[93],"We":[94],"can":[100,175,202],"impact":[101],"timing":[102,117],"parameters":[103,118],"for":[104,199],"different":[105],"banks":[106],"within":[107],"chip.":[110],"response":[112],"to":[113,125,161,166,180],"growing":[114],"PV,":[115],"likely":[120],"set":[122],"very":[123],"conservatively":[124],"accommodate":[126],"worst":[128],"case.":[129],"To":[130],"these":[132],"worst-case":[133],"limitations,":[134],"propose":[136],"design":[138],"reconfigurable":[141],"module":[143],"detects":[145],"field":[149],"organizes":[151],"system":[154,209],"into":[155],"fast/slow":[156],"regions.":[157,183],"This":[158,184],"requires":[159],"changes":[160],"controller":[164],"buffer":[167],"chips":[168],"DIMMs.":[170],"Further,":[171],"OS":[172],"migration":[173],"policies":[174],"move":[176],"frequently":[177],"accessed":[178],"pages":[179],"fast":[182],"overall":[185],"approach":[186],"not":[187],"only":[188],"improves":[189],"performance":[190,213],"energy,":[192],"it":[193],"also":[194],"provides":[195],"configurable":[197],"platform":[198],"systems":[200],"tolerate":[203],"errors":[204],"approximation.":[206],"The":[207],"proposed":[208],"yields":[210],"an":[211],"average":[212],"improvement":[214],"12.6%":[216],"systems,":[219],"25.5%":[221],"NVM":[223],"systems.":[224]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":2}],"updated_date":"2026-06-26T08:34:08.712188","created_date":"2025-10-10T00:00:00"}
