{"id":"https://openalex.org/W2211954640","doi":"https://doi.org/10.1109/iccd.2015.7357109","title":"CSL: Coordinated and scalable logic synthesis techniques for effective NBTI reduction","display_name":"CSL: Coordinated and scalable logic synthesis techniques for effective NBTI reduction","publication_year":2015,"publication_date":"2015-10-01","ids":{"openalex":"https://openalex.org/W2211954640","doi":"https://doi.org/10.1109/iccd.2015.7357109","mag":"2211954640"},"language":"en","primary_location":{"id":"doi:10.1109/iccd.2015.7357109","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccd.2015.7357109","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 33rd IEEE International Conference on Computer Design (ICCD)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101863881","display_name":"Chen-Hsuan Lin","orcid":"https://orcid.org/0000-0002-0097-7183"},"institutions":[{"id":"https://openalex.org/I157725225","display_name":"University of Illinois Urbana-Champaign","ror":"https://ror.org/047426m28","country_code":"US","type":"education","lineage":["https://openalex.org/I157725225"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Chen-Hsuan Lin","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Illinois, Urbana-Champaign, IL, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Illinois, Urbana-Champaign, IL, USA","institution_ids":["https://openalex.org/I157725225"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101967869","display_name":"Subhendu Roy","orcid":"https://orcid.org/0000-0001-8554-563X"},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Subhendu Roy","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Texas, Austin, TX, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Texas, Austin, TX, USA","institution_ids":["https://openalex.org/I86519309"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5115602054","display_name":"Chun-Yao Wang","orcid":"https://orcid.org/0000-0002-4536-214X"},"institutions":[{"id":"https://openalex.org/I25846049","display_name":"National Tsing Hua University","ror":"https://ror.org/00zdnkx70","country_code":"TW","type":"education","lineage":["https://openalex.org/I25846049"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chun-Yao Wang","raw_affiliation_strings":["National Tsing Hua University, Hsinchu, TW"],"affiliations":[{"raw_affiliation_string":"National Tsing Hua University, Hsinchu, TW","institution_ids":["https://openalex.org/I25846049"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5011883763","display_name":"David Z. Pan","orcid":"https://orcid.org/0000-0002-5705-2501"},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"David Z. Pan","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Texas, Austin, TX, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Texas, Austin, TX, USA","institution_ids":["https://openalex.org/I86519309"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5056321228","display_name":"Deming Chen","orcid":"https://orcid.org/0000-0002-3016-0270"},"institutions":[{"id":"https://openalex.org/I157725225","display_name":"University of Illinois Urbana-Champaign","ror":"https://ror.org/047426m28","country_code":"US","type":"education","lineage":["https://openalex.org/I157725225"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Deming Chen","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Illinois, Urbana-Champaign, IL, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Illinois, Urbana-Champaign, IL, USA","institution_ids":["https://openalex.org/I157725225"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5101863881"],"corresponding_institution_ids":["https://openalex.org/I157725225"],"apc_list":null,"apc_paid":null,"fwci":0.5919,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.73095042,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"236","last_page":"243"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.7710474729537964},{"id":"https://openalex.org/keywords/netlist","display_name":"Netlist","score":0.7540029883384705},{"id":"https://openalex.org/keywords/negative-bias-temperature-instability","display_name":"Negative-bias temperature instability","score":0.6930152177810669},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6429451704025269},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.6324320435523987},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.6151987314224243},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.5013139247894287},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.4752597510814667},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.4588940143585205},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4269995391368866},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.3799241781234741},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.32831740379333496},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.28177738189697266},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.19925063848495483},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.197301983833313},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.17695948481559753},{"id":"https://openalex.org/keywords/threshold-voltage","display_name":"Threshold voltage","score":0.1427842676639557},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.12150278687477112},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.1054593026638031},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.10459202527999878},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.0738774836063385}],"concepts":[{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.7710474729537964},{"id":"https://openalex.org/C177650935","wikidata":"https://www.wikidata.org/wiki/Q1760303","display_name":"Netlist","level":2,"score":0.7540029883384705},{"id":"https://openalex.org/C557185","wikidata":"https://www.wikidata.org/wiki/Q6987194","display_name":"Negative-bias temperature instability","level":5,"score":0.6930152177810669},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6429451704025269},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.6324320435523987},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.6151987314224243},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.5013139247894287},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.4752597510814667},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.4588940143585205},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4269995391368866},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3799241781234741},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.32831740379333496},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.28177738189697266},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.19925063848495483},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.197301983833313},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.17695948481559753},{"id":"https://openalex.org/C195370968","wikidata":"https://www.wikidata.org/wiki/Q1754002","display_name":"Threshold voltage","level":4,"score":0.1427842676639557},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.12150278687477112},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.1054593026638031},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.10459202527999878},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.0738774836063385},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iccd.2015.7357109","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccd.2015.7357109","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 33rd IEEE International Conference on Computer Design (ICCD)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.5600000023841858,"id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":33,"referenced_works":["https://openalex.org/W1511688816","https://openalex.org/W1974368829","https://openalex.org/W1980365623","https://openalex.org/W2031517912","https://openalex.org/W2041424982","https://openalex.org/W2047663435","https://openalex.org/W2068470721","https://openalex.org/W2081215702","https://openalex.org/W2096466247","https://openalex.org/W2103792078","https://openalex.org/W2120893974","https://openalex.org/W2122757690","https://openalex.org/W2124222584","https://openalex.org/W2140132043","https://openalex.org/W2145126108","https://openalex.org/W2154275811","https://openalex.org/W2155810574","https://openalex.org/W2164154623","https://openalex.org/W2164178706","https://openalex.org/W2166089199","https://openalex.org/W2180536720","https://openalex.org/W2427843410","https://openalex.org/W4205623694","https://openalex.org/W4234640396","https://openalex.org/W4240866746","https://openalex.org/W4249982533","https://openalex.org/W4254214313","https://openalex.org/W4256548512","https://openalex.org/W6630623413","https://openalex.org/W6675497357","https://openalex.org/W6683115417","https://openalex.org/W6684298975","https://openalex.org/W6684495112"],"related_works":["https://openalex.org/W2109670648","https://openalex.org/W2120655977","https://openalex.org/W2000778050","https://openalex.org/W4233234973","https://openalex.org/W2157874690","https://openalex.org/W2540275465","https://openalex.org/W4386694274","https://openalex.org/W1602382472","https://openalex.org/W1964556228","https://openalex.org/W3146543203"],"abstract_inverted_index":{"Negative":[0],"Bias":[1],"Temperature":[2],"Instability":[3],"(NBTI)":[4],"has":[5],"become":[6],"a":[7,37,57,135],"major":[8],"reliability":[9],"concern":[10],"in":[11,103],"nanoscale":[12],"designs.":[13,51],"Although":[14],"several":[15],"previous":[16,136],"studies":[17],"have":[18],"been":[19],"proposed":[20],"to":[21,49,76,82],"address":[22],"the":[23,94,106,144,149],"NBTI":[24,86,101,124,140],"effect":[25],"during":[26],"logic":[27,39,61,69,110],"synthesis,":[28],"their":[29,43],"performance":[30],"is":[31,93],"limited":[32],"because":[33],"of":[34,109],"focusing":[35],"on":[36,114,132],"certain":[38],"synthesis":[40,62,70],"stage.":[41],"Additionally,":[42],"complicated":[44],"algorithms":[45],"are":[46,146,152,158],"not":[47],"scalable":[48,60],"large":[50],"To":[52,88],"tackle":[53],"this,":[54],"we":[55],"propose":[56],"coordinated":[58],"and":[59,79,99,154],"approach,":[63],"which":[64],"integrates":[65],"techniques":[66],"at":[67],"different":[68],"stages,":[71],"ranging":[72],"from":[73],"subject":[74,104],"graph":[75],"technology":[77],"mapping":[78],"mapped":[80],"netlist,":[81],"achieve":[83,122],"an":[84],"effective":[85],"reduction.":[87],"our":[89,119],"best":[90],"knowledge,":[91],"this":[92],"first":[95],"work":[96,137],"that":[97,118],"considers":[98],"mitigates":[100],"impact":[102],"graphs,":[105],"earlier":[107],"stage":[108],"synthesis.":[111],"Experimental":[112],"results":[113],"industry-strength":[115],"benchmarks":[116],"show":[117],"approach":[120],"can":[121],"6.5%":[123],"delay":[125,141],"reduction":[126,142],"with":[127],"merely":[128],"2.5%":[129],"area":[130],"overhead":[131],"average,":[133],"while":[134],"barely":[138],"gets":[139],"when":[143],"circuits":[145],"optimized":[147],"beforehand,":[148],"circuit":[150],"sizes":[151],"large,":[153],"standard":[155],"cell":[156],"libraries":[157],"richer.":[159]},"counts_by_year":[{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}