{"id":"https://openalex.org/W1975003527","doi":"https://doi.org/10.1109/iccd.2014.6974731","title":"Static thread mapping for NoCs via binary instrumentation traces","display_name":"Static thread mapping for NoCs via binary instrumentation traces","publication_year":2014,"publication_date":"2014-10-01","ids":{"openalex":"https://openalex.org/W1975003527","doi":"https://doi.org/10.1109/iccd.2014.6974731","mag":"1975003527"},"language":"en","primary_location":{"id":"doi:10.1109/iccd.2014.6974731","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccd.2014.6974731","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE 32nd International Conference on Computer Design (ICCD)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5038708856","display_name":"Giordano Salvador","orcid":null},"institutions":[{"id":"https://openalex.org/I79576946","display_name":"University of Pennsylvania","ror":"https://ror.org/00b30xv10","country_code":"US","type":"education","lineage":["https://openalex.org/I79576946"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Giordano Salvador","raw_affiliation_strings":["University of Pennsylvania, Philadelphia, Pennsylvania","University of Pennsylvania,Philadelphia,USA"],"affiliations":[{"raw_affiliation_string":"University of Pennsylvania, Philadelphia, Pennsylvania","institution_ids":["https://openalex.org/I79576946"]},{"raw_affiliation_string":"University of Pennsylvania,Philadelphia,USA","institution_ids":["https://openalex.org/I79576946"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5072493688","display_name":"Siddharth Nilakantan","orcid":"https://orcid.org/0000-0003-1067-700X"},"institutions":[{"id":"https://openalex.org/I72816309","display_name":"Drexel University","ror":"https://ror.org/04bdffz58","country_code":"US","type":"education","lineage":["https://openalex.org/I72816309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Siddharth Nilakantan","raw_affiliation_strings":["Drexel University Philadelphia, Pennsylvania","Drexel University; Philadelphia Pennsylvania USA"],"affiliations":[{"raw_affiliation_string":"Drexel University Philadelphia, Pennsylvania","institution_ids":["https://openalex.org/I72816309"]},{"raw_affiliation_string":"Drexel University; Philadelphia Pennsylvania USA","institution_ids":["https://openalex.org/I72816309"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5081080799","display_name":"Bar\u0131\u015f Ta\u015fk\u0131n","orcid":"https://orcid.org/0000-0002-7631-5696"},"institutions":[{"id":"https://openalex.org/I72816309","display_name":"Drexel University","ror":"https://ror.org/04bdffz58","country_code":"US","type":"education","lineage":["https://openalex.org/I72816309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Baris Taskin","raw_affiliation_strings":["Drexel University Philadelphia, Pennsylvania","Drexel University; Philadelphia Pennsylvania USA"],"affiliations":[{"raw_affiliation_string":"Drexel University Philadelphia, Pennsylvania","institution_ids":["https://openalex.org/I72816309"]},{"raw_affiliation_string":"Drexel University; Philadelphia Pennsylvania USA","institution_ids":["https://openalex.org/I72816309"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5018352758","display_name":"Mark Hempstead","orcid":"https://orcid.org/0000-0001-9696-4741"},"institutions":[{"id":"https://openalex.org/I72816309","display_name":"Drexel University","ror":"https://ror.org/04bdffz58","country_code":"US","type":"education","lineage":["https://openalex.org/I72816309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Mark Hempstead","raw_affiliation_strings":["Drexel University Philadelphia, Pennsylvania","Drexel University; Philadelphia Pennsylvania USA"],"affiliations":[{"raw_affiliation_string":"Drexel University Philadelphia, Pennsylvania","institution_ids":["https://openalex.org/I72816309"]},{"raw_affiliation_string":"Drexel University; Philadelphia Pennsylvania USA","institution_ids":["https://openalex.org/I72816309"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5062538954","display_name":"Ankit More","orcid":"https://orcid.org/0009-0004-2813-3988"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ankit More","raw_affiliation_strings":["Intel Corporation Portland, Oregon","Intel Corporation, Portland, Oregon, USA"],"affiliations":[{"raw_affiliation_string":"Intel Corporation Portland, Oregon","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation, Portland, Oregon, USA","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5038708856"],"corresponding_institution_ids":["https://openalex.org/I79576946"],"apc_list":null,"apc_paid":null,"fwci":0.3065,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.55809828,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"517","last_page":"520"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/thread","display_name":"Thread (computing)","score":0.8027206659317017},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7633737325668335},{"id":"https://openalex.org/keywords/multiprocessing","display_name":"Multiprocessing","score":0.5566521286964417},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5504167079925537},{"id":"https://openalex.org/keywords/profiling","display_name":"Profiling (computer programming)","score":0.5498745441436768},{"id":"https://openalex.org/keywords/instrumentation","display_name":"Instrumentation (computer programming)","score":0.4654107391834259},{"id":"https://openalex.org/keywords/binary-number","display_name":"Binary number","score":0.45971181988716125},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4221537709236145},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4217541515827179},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.41304126381874084},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.4128972291946411},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.4100785255432129},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3647543787956238},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.34680354595184326},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.25974035263061523},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.09711173176765442}],"concepts":[{"id":"https://openalex.org/C138101251","wikidata":"https://www.wikidata.org/wiki/Q213092","display_name":"Thread (computing)","level":2,"score":0.8027206659317017},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7633737325668335},{"id":"https://openalex.org/C4822641","wikidata":"https://www.wikidata.org/wiki/Q846651","display_name":"Multiprocessing","level":2,"score":0.5566521286964417},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5504167079925537},{"id":"https://openalex.org/C187191949","wikidata":"https://www.wikidata.org/wiki/Q1138496","display_name":"Profiling (computer programming)","level":2,"score":0.5498745441436768},{"id":"https://openalex.org/C118530786","wikidata":"https://www.wikidata.org/wiki/Q1134732","display_name":"Instrumentation (computer programming)","level":2,"score":0.4654107391834259},{"id":"https://openalex.org/C48372109","wikidata":"https://www.wikidata.org/wiki/Q3913","display_name":"Binary number","level":2,"score":0.45971181988716125},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4221537709236145},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4217541515827179},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.41304126381874084},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.4128972291946411},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.4100785255432129},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3647543787956238},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.34680354595184326},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.25974035263061523},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.09711173176765442},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iccd.2014.6974731","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccd.2014.6974731","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE 32nd International Conference on Computer Design (ICCD)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W2018432079","https://openalex.org/W2034062945","https://openalex.org/W2039936456","https://openalex.org/W2040466547","https://openalex.org/W2066636486","https://openalex.org/W2122452659","https://openalex.org/W2133574252","https://openalex.org/W2155765360","https://openalex.org/W2160602621","https://openalex.org/W2173933029","https://openalex.org/W3141150936","https://openalex.org/W3148339845","https://openalex.org/W7005867534"],"related_works":["https://openalex.org/W2033778626","https://openalex.org/W2026780467","https://openalex.org/W2187110187","https://openalex.org/W2589019771","https://openalex.org/W2985540061","https://openalex.org/W2018697868","https://openalex.org/W2084977540","https://openalex.org/W2168921806","https://openalex.org/W2540211551","https://openalex.org/W2120080222"],"abstract_inverted_index":{"A":[0],"novel":[1,18],"methodology":[2],"is":[3,55],"proposed":[4],"for":[5,36],"thread":[6,38,53],"mapping":[7,19,54],"on":[8],"a":[9,14,25,40,51],"chip-multiprocessor":[10],"(CMP)":[11],"system":[12],"with":[13],"network-on-chip":[15],"(NoC).":[16],"This":[17],"leverages":[20],"multi-threaded":[21,41],"traces":[22,48],"produced":[23],"by":[24],"binary":[26,46],"instrumentation":[27,47],"tool,":[28],"which":[29],"classifies":[30],"the":[31,59],"communication":[32],"and":[33],"computation":[34],"events":[35],"each":[37],"of":[39],"program":[42],"application.":[43],"Processing":[44],"these":[45],"after":[49],"profiling,":[50],"static":[52],"computed":[56],"to":[57],"improve":[58],"NoC":[60],"performance.":[61]},"counts_by_year":[{"year":2015,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
