{"id":"https://openalex.org/W2020865697","doi":"https://doi.org/10.1109/iccd.2014.6974720","title":"Storage-allocation to sequential structures in High-Level Synthesis-assisted prototyping","display_name":"Storage-allocation to sequential structures in High-Level Synthesis-assisted prototyping","publication_year":2014,"publication_date":"2014-10-01","ids":{"openalex":"https://openalex.org/W2020865697","doi":"https://doi.org/10.1109/iccd.2014.6974720","mag":"2020865697"},"language":"en","primary_location":{"id":"doi:10.1109/iccd.2014.6974720","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccd.2014.6974720","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE 32nd International Conference on Computer Design (ICCD)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5005184250","display_name":"Vinay Kumar","orcid":"https://orcid.org/0000-0001-8363-2852"},"institutions":[{"id":"https://openalex.org/I162827531","display_name":"Indian Institute of Technology Bombay","ror":"https://ror.org/02qyf5152","country_code":"IN","type":"education","lineage":["https://openalex.org/I162827531"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Vinay B.Y. Kumar","raw_affiliation_strings":["Department of Electrical Engineering, Indian Institute of Technology Bombay, Mumbai, India","Dept. of Electrical Engineering, Indian Institute of Technology - Bombay, Mumbai, INDIA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Indian Institute of Technology Bombay, Mumbai, India","institution_ids":["https://openalex.org/I162827531"]},{"raw_affiliation_string":"Dept. of Electrical Engineering, Indian Institute of Technology - Bombay, Mumbai, INDIA","institution_ids":["https://openalex.org/I162827531"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5066952721","display_name":"Shovan Maity","orcid":"https://orcid.org/0000-0003-4678-9898"},"institutions":[{"id":"https://openalex.org/I162827531","display_name":"Indian Institute of Technology Bombay","ror":"https://ror.org/02qyf5152","country_code":"IN","type":"education","lineage":["https://openalex.org/I162827531"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Shovan Maity","raw_affiliation_strings":["Department of Electrical Engineering, Indian Institute of Technology Bombay, Mumbai, India","Dept. of Electrical Engineering, Indian Institute of Technology - Bombay, Mumbai, INDIA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Indian Institute of Technology Bombay, Mumbai, India","institution_ids":["https://openalex.org/I162827531"]},{"raw_affiliation_string":"Dept. of Electrical Engineering, Indian Institute of Technology - Bombay, Mumbai, INDIA","institution_ids":["https://openalex.org/I162827531"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5011009172","display_name":"Sachin Patkar","orcid":"https://orcid.org/0009-0003-6053-6886"},"institutions":[{"id":"https://openalex.org/I162827531","display_name":"Indian Institute of Technology Bombay","ror":"https://ror.org/02qyf5152","country_code":"IN","type":"education","lineage":["https://openalex.org/I162827531"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Sachin B. Patkar","raw_affiliation_strings":["Department of Electrical Engineering, Indian Institute of Technology Bombay, Mumbai, India","Dept. of Electrical Engineering, Indian Institute of Technology - Bombay, Mumbai, INDIA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Indian Institute of Technology Bombay, Mumbai, India","institution_ids":["https://openalex.org/I162827531"]},{"raw_affiliation_string":"Dept. of Electrical Engineering, Indian Institute of Technology - Bombay, Mumbai, INDIA","institution_ids":["https://openalex.org/I162827531"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.09189327,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"6","issue":null,"first_page":"464","last_page":"469"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9929999709129333,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.831043004989624},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.6767185926437378},{"id":"https://openalex.org/keywords/verilog","display_name":"Verilog","score":0.6589648723602295},{"id":"https://openalex.org/keywords/queue","display_name":"Queue","score":0.5214085578918457},{"id":"https://openalex.org/keywords/matrix-multiplication","display_name":"Matrix multiplication","score":0.4550451338291168},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4479774236679077},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.40814682841300964},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.333248496055603},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.1576431393623352}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.831043004989624},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.6767185926437378},{"id":"https://openalex.org/C2779030575","wikidata":"https://www.wikidata.org/wiki/Q827773","display_name":"Verilog","level":3,"score":0.6589648723602295},{"id":"https://openalex.org/C160403385","wikidata":"https://www.wikidata.org/wiki/Q220543","display_name":"Queue","level":2,"score":0.5214085578918457},{"id":"https://openalex.org/C17349429","wikidata":"https://www.wikidata.org/wiki/Q1049914","display_name":"Matrix multiplication","level":3,"score":0.4550451338291168},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4479774236679077},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.40814682841300964},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.333248496055603},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.1576431393623352},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C84114770","wikidata":"https://www.wikidata.org/wiki/Q46344","display_name":"Quantum","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iccd.2014.6974720","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccd.2014.6974720","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE 32nd International Conference on Computer Design (ICCD)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8299999833106995,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W42313609","https://openalex.org/W2018055497","https://openalex.org/W2098070375","https://openalex.org/W2104157164","https://openalex.org/W2162328687","https://openalex.org/W2482246557","https://openalex.org/W4251245863","https://openalex.org/W6683974996"],"related_works":["https://openalex.org/W2111241003","https://openalex.org/W2387264083","https://openalex.org/W2604877941","https://openalex.org/W1669114967","https://openalex.org/W2390885485","https://openalex.org/W2362523726","https://openalex.org/W2612099726","https://openalex.org/W2005854230","https://openalex.org/W2168113051","https://openalex.org/W2160632767"],"abstract_inverted_index":{"Algorithm-to-hardware":[0],"High-Level":[1],"Synthesis":[2],"(HLS)":[3],"tools":[4],"are":[5,26],"becoming":[6],"increasingly":[7],"practical,":[8],"particularly":[9],"the":[10,123],"domain":[11],"specific":[12],"approaches":[13],"to":[14,28,40,67,78,107,118],"HLS.":[15],"Storage":[16],"allocation":[17,39,66,77],"is":[18],"an":[19],"important":[20],"step":[21],"in":[22,152],"HLS":[23,33,109],"where":[24],"variables":[25],"mapped":[27],"onchip":[29],"storage":[30,65,76],"structures":[31],"(OSS).":[32],"flows":[34],"almost":[35],"exclusively":[36],"do":[37],"this":[38,57],"random":[41],"access":[42,69,83],"OSS":[43],"whereas":[44],"custom":[45],"designers":[46],"often":[47],"pick":[48],"from":[49],"a":[50,60,145],"repertoire":[51],"of":[52,64,81,127],"intuitive":[53],"algorithm-appropriate":[54],"OSS.":[55],"In":[56],"work,":[58],"revisiting":[59],"sparsely":[61],"addressed":[62],"problem":[63],"sequential":[68,82],"OSS,":[70],"we":[71],"report":[72],"tractable":[73],"algorithms":[74],"for":[75,95],"three":[79],"kinds":[80],"style":[84],"memories-Queue,":[85],"Queue-Read":[86],"Sequential-Write":[87,92],"memory":[88,93],"(QRSWM),":[89],"and":[90,101,132,141],"Sequential-Read":[91],"(SRSWM)-suitable":[94],"domains":[96],"such":[97,129,137],"as":[98,130,138],"signal":[99],"processing":[100],"matrix":[102,139],"computations.":[103],"A":[104],"basic":[105],"C":[106],"Verilog":[108],"flow":[110],"was":[111],"developed":[112],"integrating":[113],"these":[114],"new":[115],"allocations":[116],"options":[117],"evaluate":[119],"their":[120],"impact":[121],"on":[122],"overall":[124],"design":[125],"metrics":[126],"interest":[128],"area":[131],"power.":[133],"On":[134],"application":[135],"cases":[136],"multiplication":[140],"2D/3D":[142],"wavelet":[143],"filtering,":[144],"comparison":[146],"vis-a-vis":[147],"RAM":[148],"shows":[149],"significant":[150],"improvements":[151],"power":[153],"consumption":[154],"when":[155],"targeting":[156],"TSMC":[157],"0.18\u03bc":[158],"technology.":[159]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
