{"id":"https://openalex.org/W2151988735","doi":"https://doi.org/10.1109/iccd.2013.6657065","title":"Simulation and architecture improvements of atomic operations on GPU scratchpad memory","display_name":"Simulation and architecture improvements of atomic operations on GPU scratchpad memory","publication_year":2013,"publication_date":"2013-10-01","ids":{"openalex":"https://openalex.org/W2151988735","doi":"https://doi.org/10.1109/iccd.2013.6657065","mag":"2151988735"},"language":"en","primary_location":{"id":"doi:10.1109/iccd.2013.6657065","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccd.2013.6657065","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE 31st International Conference on Computer Design (ICCD)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5065390322","display_name":"Gert-Jan van den Braak","orcid":null},"institutions":[{"id":"https://openalex.org/I83019370","display_name":"Eindhoven University of Technology","ror":"https://ror.org/02c2kyt77","country_code":"NL","type":"education","lineage":["https://openalex.org/I83019370"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Gert-Jan van den Braak","raw_affiliation_strings":["Department of Electrical Engineering, Eindhoven University of Technology, The Netherlands"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Eindhoven University of Technology, The Netherlands","institution_ids":["https://openalex.org/I83019370"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5044416322","display_name":"Juan G\u00f3mez-Luna","orcid":"https://orcid.org/0000-0002-6514-1571"},"institutions":[{"id":"https://openalex.org/I53110688","display_name":"University of C\u00f3rdoba","ror":"https://ror.org/05yc77b46","country_code":"ES","type":"education","lineage":["https://openalex.org/I53110688"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Juan Gomez-Luna","raw_affiliation_strings":["Universidad de Cordoba, Cordoba, Andaluc\u00c3\u00ada, ES","Universidad de Cordoba, Cordoba, Andaluc\u00eda, ES"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Universidad de Cordoba, Cordoba, Andaluc\u00c3\u00ada, ES","institution_ids":["https://openalex.org/I53110688"]},{"raw_affiliation_string":"Universidad de Cordoba, Cordoba, Andaluc\u00eda, ES","institution_ids":["https://openalex.org/I53110688"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5081768631","display_name":"Henk Corporaal","orcid":"https://orcid.org/0000-0003-4506-5732"},"institutions":[{"id":"https://openalex.org/I83019370","display_name":"Eindhoven University of Technology","ror":"https://ror.org/02c2kyt77","country_code":"NL","type":"education","lineage":["https://openalex.org/I83019370"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Henk Corporaal","raw_affiliation_strings":["Department of Electrical Engineering, Eindhoven University of Technology, The Netherlands"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Eindhoven University of Technology, The Netherlands","institution_ids":["https://openalex.org/I83019370"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5069104967","display_name":"Jos\u00e9 Mar\u00eda Gonz\u00e1lez-Linares","orcid":"https://orcid.org/0000-0002-0545-5958"},"institutions":[{"id":"https://openalex.org/I82767444","display_name":"Universidad de M\u00e1laga","ror":"https://ror.org/036b2ww28","country_code":"ES","type":"education","lineage":["https://openalex.org/I82767444"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Jose Maria Gonzalez-Linares","raw_affiliation_strings":["Department of Computer Architecture, University of M\u00e1laga, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Architecture, University of M\u00e1laga, Spain","institution_ids":["https://openalex.org/I82767444"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5029567783","display_name":"Nicol\u00e1s Guil","orcid":"https://orcid.org/0000-0003-3431-6516"},"institutions":[{"id":"https://openalex.org/I82767444","display_name":"Universidad de M\u00e1laga","ror":"https://ror.org/036b2ww28","country_code":"ES","type":"education","lineage":["https://openalex.org/I82767444"]}],"countries":["ES"],"is_corresponding":false,"raw_author_name":"Nicolas Guil","raw_affiliation_strings":["Department of Computer Architecture, University of M\u00e1laga, Spain"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Architecture, University of M\u00e1laga, Spain","institution_ids":["https://openalex.org/I82767444"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.6229,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.71805543,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"357","last_page":"362"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10682","display_name":"Quantum Computing Algorithms and Architecture","score":0.9825000166893005,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9557999968528748,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8719300031661987},{"id":"https://openalex.org/keywords/serialization","display_name":"Serialization","score":0.8099204301834106},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.7514088153839111},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.5464545488357544},{"id":"https://openalex.org/keywords/correctness","display_name":"Correctness","score":0.451218843460083},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.24622559547424316},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.18771612644195557}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8719300031661987},{"id":"https://openalex.org/C52723943","wikidata":"https://www.wikidata.org/wiki/Q1127410","display_name":"Serialization","level":2,"score":0.8099204301834106},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.7514088153839111},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.5464545488357544},{"id":"https://openalex.org/C55439883","wikidata":"https://www.wikidata.org/wiki/Q360812","display_name":"Correctness","level":2,"score":0.451218843460083},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.24622559547424316},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.18771612644195557}],"mesh":[],"locations_count":4,"locations":[{"id":"doi:10.1109/iccd.2013.6657065","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccd.2013.6657065","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE 31st International Conference on Computer Design (ICCD)","raw_type":"proceedings-article"},{"id":"pmh:oai:pure.tue.nl:openaire_cris_publications/35cfc18b-ecaf-446d-a918-db3f22dbf6bc","is_oa":false,"landing_page_url":"https://research.tue.nl/en/publications/35cfc18b-ecaf-446d-a918-db3f22dbf6bc","pdf_url":null,"source":{"id":"https://openalex.org/S4406922641","display_name":"TU/e Research Portal","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Braak, van den, G J W, Gomez Luna, J, Corporaal, H, Gonzalez-Linares, J M & Guil, N 2013, Simulation and architecture improvements of atomic operations on GPU scratchpad memory. in Proceedings of the IEEE 31st International Conference on Computer Design (ICCD) 2013, 6-9 October 2013,. Institute of Electrical and Electronics Engineers, Piscataway, pp. 357-362, 31st IEEE International Conference on Computer Design (ICCD 2013), Asheville, NC, North Carolina, United States, 6/10/13. https://doi.org/10.1109/ICCD.2013.6657065","raw_type":"info:eu-repo/semantics/conferenceObject"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.721.3413","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.721.3413","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://parse.ele.tue.nl/system/attachments/57/original/Simulation_and_Architecture_Improvements_of_Atomic_Operations_on_GPU_Scratchpad_Memory.pdf","raw_type":"text"},{"id":"pmh:tue:oai:pure.tue.nl:publications/35cfc18b-ecaf-446d-a918-db3f22dbf6bc","is_oa":false,"landing_page_url":"https://research.tue.nl/nl/publications/35cfc18b-ecaf-446d-a918-db3f22dbf6bc","pdf_url":null,"source":{"id":"https://openalex.org/S4306401843","display_name":"Data Archiving and Networked Services (DANS)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I1322597698","host_organization_name":"Royal Netherlands Academy of Arts and Sciences","host_organization_lineage":["https://openalex.org/I1322597698"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"Proceedings of the IEEE 31st International Conference on Computer Design (ICCD) 2013, 6-9 October 2013,, 357 - 362","raw_type":"info:eu-repo/semantics/conferencepaper"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":19,"referenced_works":["https://openalex.org/W12519965","https://openalex.org/W1485859077","https://openalex.org/W1719340579","https://openalex.org/W1979527452","https://openalex.org/W1988949113","https://openalex.org/W2019708326","https://openalex.org/W2063186542","https://openalex.org/W2066631028","https://openalex.org/W2088134616","https://openalex.org/W2095905764","https://openalex.org/W2118513230","https://openalex.org/W2120004483","https://openalex.org/W2130336316","https://openalex.org/W2145455679","https://openalex.org/W2165509299","https://openalex.org/W2165697076","https://openalex.org/W2207292641","https://openalex.org/W3141650078","https://openalex.org/W6688251008"],"related_works":["https://openalex.org/W2382545918","https://openalex.org/W2317245370","https://openalex.org/W4249323025","https://openalex.org/W198851386","https://openalex.org/W2030310580","https://openalex.org/W947442053","https://openalex.org/W1980160788","https://openalex.org/W2148915962","https://openalex.org/W2283866686","https://openalex.org/W4287182096"],"abstract_inverted_index":{"GPUs":[0],"are":[1],"increasingly":[2],"used":[3],"as":[4,35],"compute":[5],"accelerators.":[6],"With":[7],"a":[8,90,117,142],"large":[9],"number":[10,17],"of":[11,18,43,69,97,103,111,120],"cores":[12],"executing":[13],"an":[14,67],"even":[15],"larger":[16],"threads,":[19],"significant":[20],"speed-ups":[21],"can":[22,63],"be":[23],"attained":[24],"for":[25,156],"parallel":[26],"workloads.":[27],"Applications":[28],"that":[29,56,74],"rely":[30],"on":[31,123,149],"atomic":[32,121],"operations,":[33],"such":[34],"histogram":[36,157],"and":[37,78,100,128,147,158],"Hough":[38,159],"transform,":[39],"suffer":[40],"from":[41],"serialization":[42,59,76],"threads":[44],"in":[45,93,126,141],"case":[46],"they":[47],"update":[48],"the":[49,95,98,101,104,109,152],"same":[50],"memory":[51,125],"location.":[52],"Previous":[53],"work":[54],"shows":[55],"reducing":[57],"this":[58,85],"with":[60,163],"software":[61,154],"techniques":[62,155],"increase":[64],"performance":[65],"by":[66],"order":[68],"magnitude.":[70],"We":[71],"observe,":[72],"however,":[73],"some":[75],"remains":[77],"still":[79],"slows":[80],"down":[81],"these":[82,112],"applications.":[83],"Therefore,":[84],"paper":[86],"proposes":[87],"to":[88,145],"use":[89],"hash":[91],"function":[92],"both":[94],"addressing":[96],"banks":[99],"locks":[102],"scratchpad":[105,124],"memory.":[106],"To":[107],"measure":[108],"effects":[110],"changes,":[113],"we":[114,133],"first":[115],"implement":[116],"detailed":[118],"model":[119],"operations":[122],"GPGPU-Sim,":[127],"verify":[129],"its":[130],"correctness.":[131],"Second,":[132],"test":[134],"our":[135],"proposed":[136],"hardware":[137,165],"changes.":[138],"They":[139],"result":[140],"speed-up":[143],"up":[144],"4.9\u00d7":[146],"1.8\u00d7":[148],"implementations":[150],"utilizing":[151],"aforementioned":[153],"transform":[160],"applications":[161],"respectively,":[162],"minimum":[164],"costs.":[166]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":1}],"updated_date":"2026-07-02T09:51:11.867554","created_date":"2025-10-10T00:00:00"}