{"id":"https://openalex.org/W1976905836","doi":"https://doi.org/10.1109/iccd.2013.6657045","title":"Sneak path testing and fault modeling for multilevel memristor-based memories","display_name":"Sneak path testing and fault modeling for multilevel memristor-based memories","publication_year":2013,"publication_date":"2013-10-01","ids":{"openalex":"https://openalex.org/W1976905836","doi":"https://doi.org/10.1109/iccd.2013.6657045","mag":"1976905836"},"language":"en","primary_location":{"id":"doi:10.1109/iccd.2013.6657045","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccd.2013.6657045","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE 31st International Conference on Computer Design (ICCD)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5079732524","display_name":"Sachhidh Kannan","orcid":null},"institutions":[{"id":"https://openalex.org/I90965887","display_name":"SUNY Polytechnic Institute","ror":"https://ror.org/000fxgx19","country_code":"US","type":"education","lineage":["https://openalex.org/I90965887"]},{"id":"https://openalex.org/I57206974","display_name":"New York University","ror":"https://ror.org/0190ak572","country_code":"US","type":"education","lineage":["https://openalex.org/I57206974"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Sachhidh Kannan","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Polytechnic Institute of New York University, Brooklyn, United States of America","Dept. of Electr. & Comput. Eng., Polytech. Inst. of New York Univ., Brooklyn, NY, USA#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Polytechnic Institute of New York University, Brooklyn, United States of America","institution_ids":["https://openalex.org/I90965887","https://openalex.org/I57206974"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Polytech. Inst. of New York Univ., Brooklyn, NY, USA#TAB#","institution_ids":["https://openalex.org/I57206974"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5059648257","display_name":"Ramesh Karri","orcid":"https://orcid.org/0000-0001-7989-5617"},"institutions":[{"id":"https://openalex.org/I90965887","display_name":"SUNY Polytechnic Institute","ror":"https://ror.org/000fxgx19","country_code":"US","type":"education","lineage":["https://openalex.org/I90965887"]},{"id":"https://openalex.org/I57206974","display_name":"New York University","ror":"https://ror.org/0190ak572","country_code":"US","type":"education","lineage":["https://openalex.org/I57206974"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ramesh Karri","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Polytechnic Institute of New York University, Brooklyn, United States of America","Dept. of Electr. & Comput. Eng., Polytech. Inst. of New York Univ., Brooklyn, NY, USA#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Polytechnic Institute of New York University, Brooklyn, United States of America","institution_ids":["https://openalex.org/I90965887","https://openalex.org/I57206974"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Polytech. Inst. of New York Univ., Brooklyn, NY, USA#TAB#","institution_ids":["https://openalex.org/I57206974"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5059987567","display_name":"Ozgur Sinanoglu","orcid":"https://orcid.org/0000-0003-0782-0397"},"institutions":[{"id":"https://openalex.org/I120250893","display_name":"New York University Abu Dhabi","ror":"https://ror.org/00e5k0821","country_code":"AE","type":"education","lineage":["https://openalex.org/I120250893","https://openalex.org/I57206974"]}],"countries":["AE"],"is_corresponding":false,"raw_author_name":"Ozgur Sinanoglu","raw_affiliation_strings":["Department of Engineering, New York University Abu Dhabi, Abu Dhabi, United Arab Emirates","Department of Engineering, New York University, Abu Dhabi, United Arab Emirates"],"affiliations":[{"raw_affiliation_string":"Department of Engineering, New York University Abu Dhabi, Abu Dhabi, United Arab Emirates","institution_ids":["https://openalex.org/I120250893"]},{"raw_affiliation_string":"Department of Engineering, New York University, Abu Dhabi, United Arab Emirates","institution_ids":["https://openalex.org/I120250893"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5079732524"],"corresponding_institution_ids":["https://openalex.org/I57206974","https://openalex.org/I90965887"],"apc_list":null,"apc_paid":null,"fwci":1.6551,"has_fulltext":false,"cited_by_count":23,"citation_normalized_percentile":{"value":0.84827869,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"215","last_page":"220"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/memristor","display_name":"Memristor","score":0.9683243036270142},{"id":"https://openalex.org/keywords/memistor","display_name":"Memistor","score":0.7724099159240723},{"id":"https://openalex.org/keywords/crossbar-switch","display_name":"Crossbar switch","score":0.6993951797485352},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6734427213668823},{"id":"https://openalex.org/keywords/resistive-random-access-memory","display_name":"Resistive random-access memory","score":0.48724809288978577},{"id":"https://openalex.org/keywords/non-volatile-memory","display_name":"Non-volatile memory","score":0.47682493925094604},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.32367566227912903},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.21705085039138794},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.16140758991241455},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.14153406023979187},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.1025109589099884}],"concepts":[{"id":"https://openalex.org/C150072547","wikidata":"https://www.wikidata.org/wiki/Q212923","display_name":"Memristor","level":2,"score":0.9683243036270142},{"id":"https://openalex.org/C1895703","wikidata":"https://www.wikidata.org/wiki/Q6034938","display_name":"Memistor","level":4,"score":0.7724099159240723},{"id":"https://openalex.org/C29984679","wikidata":"https://www.wikidata.org/wiki/Q1929149","display_name":"Crossbar switch","level":2,"score":0.6993951797485352},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6734427213668823},{"id":"https://openalex.org/C182019814","wikidata":"https://www.wikidata.org/wiki/Q1143830","display_name":"Resistive random-access memory","level":3,"score":0.48724809288978577},{"id":"https://openalex.org/C177950962","wikidata":"https://www.wikidata.org/wiki/Q10997658","display_name":"Non-volatile memory","level":2,"score":0.47682493925094604},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.32367566227912903},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.21705085039138794},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.16140758991241455},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.14153406023979187},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.1025109589099884},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iccd.2013.6657045","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccd.2013.6657045","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE 31st International Conference on Computer Design (ICCD)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.49000000953674316,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":21,"referenced_works":["https://openalex.org/W1595368737","https://openalex.org/W1968288892","https://openalex.org/W1982533447","https://openalex.org/W1986041982","https://openalex.org/W2000321316","https://openalex.org/W2003633368","https://openalex.org/W2008901850","https://openalex.org/W2021216084","https://openalex.org/W2022318845","https://openalex.org/W2035027123","https://openalex.org/W2059323493","https://openalex.org/W2080391538","https://openalex.org/W2097733820","https://openalex.org/W2112181056","https://openalex.org/W2125223858","https://openalex.org/W2132762610","https://openalex.org/W2161330443","https://openalex.org/W2162651880","https://openalex.org/W2171130799","https://openalex.org/W4252884382","https://openalex.org/W6652589295"],"related_works":["https://openalex.org/W2171130799","https://openalex.org/W4317826599","https://openalex.org/W4253441086","https://openalex.org/W2126856948","https://openalex.org/W2548135880","https://openalex.org/W2015477599","https://openalex.org/W2106343578","https://openalex.org/W2516929886","https://openalex.org/W3177379469","https://openalex.org/W2588565308"],"abstract_inverted_index":{"Memristors":[0],"are":[1,36],"an":[2,113],"attractive":[3],"option":[4],"for":[5,78,107],"use":[6],"in":[7,25,60,128],"future":[8],"memory":[9,89,94],"architectures":[10],"due":[11,42],"to":[12,21,38,43,86,117,131],"their":[13],"non-volatility,":[14],"low":[15],"power":[16],"operation,":[17],"compactness":[18],"and":[19,33,66,103,139],"ability":[20],"store":[22],"multiple":[23,133],"bits":[24],"a":[26,51,88,97],"single":[27],"cell.":[28],"Notwithstanding":[29],"these":[30],"advantages,":[31],"memristors":[32,65,134],"memristor-based":[34,109,119],"memories":[35,130],"prone":[37],"high":[39],"defect":[40,58],"densities":[41],"the":[44,57,136,142],"non-deterministic":[45],"nature":[46],"of":[47],"nanoscale":[48],"fabrication.":[49],"As":[50],"first":[52],"step,":[53],"we":[54],"will":[55,72],"examine":[56],"mechanisms":[59],"multi-level":[61,79],"cells":[62],"(MLC)":[63],"using":[64],"develop":[67],"efficient":[68,75,114],"fault":[69],"models.":[70],"We":[71,111],"also":[73],"investigate":[74],"test":[76,118,132,143],"techniques":[77],"memristor":[80],"based":[81],"memories.":[82,110,120],"The":[83,121],"typical":[84],"approach":[85],"testing":[87,92,115],"subsystem":[90],"entails":[91],"one":[93],"cell":[95],"at":[96,135],"time.":[98],"This":[99],"is":[100],"time":[101,138,144],"consuming":[102],"does":[104],"not":[105],"scale":[106],"dense,":[108],"propose":[112],"technique":[116],"proposed":[122],"scheme":[123],"uses":[124],"sneak":[125],"paths":[126],"inherent":[127],"crossbar":[129],"same":[137],"thereby":[140],"reduces":[141],"by":[145],"27%.":[146]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":8},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":2},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":3},{"year":2014,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
