{"id":"https://openalex.org/W1989578081","doi":"https://doi.org/10.1109/iccd.2013.6657030","title":"Power gating with block migration in chip-multiprocessor last-level caches","display_name":"Power gating with block migration in chip-multiprocessor last-level caches","publication_year":2013,"publication_date":"2013-10-01","ids":{"openalex":"https://openalex.org/W1989578081","doi":"https://doi.org/10.1109/iccd.2013.6657030","mag":"1989578081"},"language":"en","primary_location":{"id":"doi:10.1109/iccd.2013.6657030","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccd.2013.6657030","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE 31st International Conference on Computer Design (ICCD)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5022960146","display_name":"David Kadjo","orcid":null},"institutions":[{"id":"https://openalex.org/I91045830","display_name":"Texas A&M University","ror":"https://ror.org/01f5ytq51","country_code":"US","type":"education","lineage":["https://openalex.org/I91045830"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"David Kadjo","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Texas A& M University, College Station, TX","Dept. of Electr. & Comput. Eng., Texas A & M Univ., College Station, TX, , USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Texas A& M University, College Station, TX","institution_ids":["https://openalex.org/I91045830"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Texas A & M Univ., College Station, TX, , USA","institution_ids":["https://openalex.org/I91045830"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100388393","display_name":"Hyungjun Kim","orcid":"https://orcid.org/0009-0003-5078-4405"},"institutions":[{"id":"https://openalex.org/I91045830","display_name":"Texas A&M University","ror":"https://ror.org/01f5ytq51","country_code":"US","type":"education","lineage":["https://openalex.org/I91045830"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Hyungjun Kim","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Texas A& M University, College Station, TX","Dept. of Electr. & Comput. Eng., Texas A & M Univ., College Station, TX, , USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Texas A& M University, College Station, TX","institution_ids":["https://openalex.org/I91045830"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Texas A & M Univ., College Station, TX, , USA","institution_ids":["https://openalex.org/I91045830"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5082578661","display_name":"Paul V. Gratz","orcid":"https://orcid.org/0000-0001-7120-7189"},"institutions":[{"id":"https://openalex.org/I91045830","display_name":"Texas A&M University","ror":"https://ror.org/01f5ytq51","country_code":"US","type":"education","lineage":["https://openalex.org/I91045830"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Paul Gratz","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Texas A& M University, College Station, TX","Dept. of Electr. & Comput. Eng., Texas A & M Univ., College Station, TX, , USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Texas A& M University, College Station, TX","institution_ids":["https://openalex.org/I91045830"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Texas A & M Univ., College Station, TX, , USA","institution_ids":["https://openalex.org/I91045830"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103246390","display_name":"Jiang Hu","orcid":"https://orcid.org/0000-0003-1157-7799"},"institutions":[{"id":"https://openalex.org/I91045830","display_name":"Texas A&M University","ror":"https://ror.org/01f5ytq51","country_code":"US","type":"education","lineage":["https://openalex.org/I91045830"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Jiang Hu","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Texas A& M University, College Station, TX","Dept. of Electr. & Comput. Eng., Texas A & M Univ., College Station, TX, , USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Texas A& M University, College Station, TX","institution_ids":["https://openalex.org/I91045830"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Texas A & M Univ., College Station, TX, , USA","institution_ids":["https://openalex.org/I91045830"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5078114699","display_name":"Raid Ayoub","orcid":"https://orcid.org/0000-0002-1175-2983"},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Raid Ayoub","raw_affiliation_strings":["Intel Corporation, Hillsboro, OR","Intel Corporation, , Hillsboro, OR, USA"],"affiliations":[{"raw_affiliation_string":"Intel Corporation, Hillsboro, OR","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Corporation, , Hillsboro, OR, USA","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5022960146"],"corresponding_institution_ids":["https://openalex.org/I91045830"],"apc_list":null,"apc_paid":null,"fwci":2.8369,"has_fulltext":false,"cited_by_count":18,"citation_normalized_percentile":{"value":0.90313365,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"93","last_page":"99"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/power-gating","display_name":"Power gating","score":0.8481217622756958},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7512853145599365},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.715120792388916},{"id":"https://openalex.org/keywords/partition","display_name":"Partition (number theory)","score":0.6883804202079773},{"id":"https://openalex.org/keywords/locality","display_name":"Locality","score":0.6559298634529114},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.6277673840522766},{"id":"https://openalex.org/keywords/locality-of-reference","display_name":"Locality of reference","score":0.554913341999054},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5341355800628662},{"id":"https://openalex.org/keywords/multiprocessing","display_name":"Multiprocessing","score":0.46435311436653137},{"id":"https://openalex.org/keywords/cache-pollution","display_name":"Cache pollution","score":0.4397001266479492},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4130754768848419},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.41034364700317383},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.37407857179641724},{"id":"https://openalex.org/keywords/cache-algorithms","display_name":"Cache algorithms","score":0.31070131063461304},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.18728578090667725},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1014971137046814},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.09626305103302002},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.07606479525566101}],"concepts":[{"id":"https://openalex.org/C2780700455","wikidata":"https://www.wikidata.org/wiki/Q7236515","display_name":"Power gating","level":4,"score":0.8481217622756958},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7512853145599365},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.715120792388916},{"id":"https://openalex.org/C42812","wikidata":"https://www.wikidata.org/wiki/Q1082910","display_name":"Partition (number theory)","level":2,"score":0.6883804202079773},{"id":"https://openalex.org/C2779808786","wikidata":"https://www.wikidata.org/wiki/Q6664603","display_name":"Locality","level":2,"score":0.6559298634529114},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.6277673840522766},{"id":"https://openalex.org/C27602214","wikidata":"https://www.wikidata.org/wiki/Q1868547","display_name":"Locality of reference","level":3,"score":0.554913341999054},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5341355800628662},{"id":"https://openalex.org/C4822641","wikidata":"https://www.wikidata.org/wiki/Q846651","display_name":"Multiprocessing","level":2,"score":0.46435311436653137},{"id":"https://openalex.org/C113166858","wikidata":"https://www.wikidata.org/wiki/Q5015981","display_name":"Cache pollution","level":5,"score":0.4397001266479492},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4130754768848419},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.41034364700317383},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.37407857179641724},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.31070131063461304},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.18728578090667725},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1014971137046814},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.09626305103302002},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.07606479525566101},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0},{"id":"https://openalex.org/C41895202","wikidata":"https://www.wikidata.org/wiki/Q8162","display_name":"Linguistics","level":1,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iccd.2013.6657030","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccd.2013.6657030","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2013 IEEE 31st International Conference on Computer Design (ICCD)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.800000011920929,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":24,"referenced_works":["https://openalex.org/W2006312753","https://openalex.org/W2009120826","https://openalex.org/W2045110768","https://openalex.org/W2048352387","https://openalex.org/W2075190356","https://openalex.org/W2101308451","https://openalex.org/W2105102111","https://openalex.org/W2110999128","https://openalex.org/W2111397647","https://openalex.org/W2126357937","https://openalex.org/W2131054871","https://openalex.org/W2147657366","https://openalex.org/W2149412112","https://openalex.org/W2155396321","https://openalex.org/W2160428323","https://openalex.org/W2161991038","https://openalex.org/W2164705534","https://openalex.org/W2170532136","https://openalex.org/W2174102096","https://openalex.org/W4235106764","https://openalex.org/W4248310916","https://openalex.org/W4253202538","https://openalex.org/W6651700774","https://openalex.org/W6830300290"],"related_works":["https://openalex.org/W2012518269","https://openalex.org/W1970102182","https://openalex.org/W2086718556","https://openalex.org/W2167303720","https://openalex.org/W2089633376","https://openalex.org/W2066160958","https://openalex.org/W2524492834","https://openalex.org/W2146079099","https://openalex.org/W1990148552","https://openalex.org/W1860107648"],"abstract_inverted_index":{"We":[0,56],"propose":[1,57],"a":[2,40,58,92],"novel":[3],"technique":[4],"to":[5,52,67,74,87],"significantly":[6],"reduce":[7],"the":[8,33,43,62,78,83,88],"leakage":[9],"energy":[10,103],"of":[11,42,105,111],"last":[12],"level":[13],"caches":[14],"while":[15],"mitigating":[16],"any":[17],"significant":[18],"performance":[19,54,94,109],"impact.":[20],"In":[21],"general,":[22],"cache":[23],"blocks":[24,66,72],"are":[25,80],"not":[26],"ordered":[27],"by":[28],"their":[29],"temporal":[30,64],"locality":[31,65],"within":[32],"sets;":[34],"hence,":[35],"simply":[36],"power":[37,69],"gating":[38],"off":[39],"partition":[41,84,90],"cache,":[44],"as":[45],"done":[46],"in":[47,77],"previous":[48],"studies,":[49],"may":[50],"lead":[51],"considerable":[53],"degradation.":[55],"solution":[59],"that":[60],"migrates":[61],"high":[63],"facilitate":[68],"gating,":[70],"where":[71],"likely":[73],"be":[75],"used":[76],"future":[79],"migrated":[81],"from":[82],"being":[85],"shutdown":[86],"live":[89],"at":[91,107],"negligible":[93],"impact":[95],"and":[96],"hardware":[97],"overhead.":[98],"Our":[99],"detailed":[100],"simulations":[101],"show":[102],"savings":[104],"66%":[106],"low":[108],"degradation":[110],"2.16%.":[112]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2019,"cited_by_count":3},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":4},{"year":2015,"cited_by_count":4},{"year":2014,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}