{"id":"https://openalex.org/W2002651175","doi":"https://doi.org/10.1109/iccd.2012.6378700","title":"Non-enumerative generation of statistical path delays for ATPG","display_name":"Non-enumerative generation of statistical path delays for ATPG","publication_year":2012,"publication_date":"2012-09-01","ids":{"openalex":"https://openalex.org/W2002651175","doi":"https://doi.org/10.1109/iccd.2012.6378700","mag":"2002651175"},"language":"en","primary_location":{"id":"doi:10.1109/iccd.2012.6378700","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccd.2012.6378700","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 IEEE 30th International Conference on Computer Design (ICCD)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5075542504","display_name":"Ahish Mysore Somashekar","orcid":"https://orcid.org/0000-0002-5374-5239"},"institutions":[{"id":"https://openalex.org/I110378019","display_name":"Southern Illinois University Carbondale","ror":"https://ror.org/049kefs16","country_code":"US","type":"education","lineage":["https://openalex.org/I110378019","https://openalex.org/I2801502357"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Ahish Mysore Somashekar","raw_affiliation_strings":["ECE Department, Southem Illinois University, Carbondale, IL, USA","ECE Dept., Southern Illinois University, Carbondale, IL 62901, USA"],"affiliations":[{"raw_affiliation_string":"ECE Department, Southem Illinois University, Carbondale, IL, USA","institution_ids":["https://openalex.org/I110378019"]},{"raw_affiliation_string":"ECE Dept., Southern Illinois University, Carbondale, IL 62901, USA","institution_ids":["https://openalex.org/I110378019"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5083284025","display_name":"Spyros Tragoudas","orcid":"https://orcid.org/0009-0006-2575-3588"},"institutions":[{"id":"https://openalex.org/I110378019","display_name":"Southern Illinois University Carbondale","ror":"https://ror.org/049kefs16","country_code":"US","type":"education","lineage":["https://openalex.org/I110378019","https://openalex.org/I2801502357"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Spyros Tragoudas","raw_affiliation_strings":["ECE Department, Southem Illinois University, Carbondale, IL, USA","ECE Dept., Southern Illinois University, Carbondale, IL 62901, USA"],"affiliations":[{"raw_affiliation_string":"ECE Department, Southem Illinois University, Carbondale, IL, USA","institution_ids":["https://openalex.org/I110378019"]},{"raw_affiliation_string":"ECE Dept., Southern Illinois University, Carbondale, IL 62901, USA","institution_ids":["https://openalex.org/I110378019"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5036248447","display_name":"Sreenivas Gangadhar","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sreenivas Gangadhar","raw_affiliation_strings":["Intel, Folsom, CA, USA","Intel Folsom, CA 95630, USA"],"affiliations":[{"raw_affiliation_string":"Intel, Folsom, CA, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Folsom, CA 95630, USA","institution_ids":["https://openalex.org/I1343180700"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5071982937","display_name":"R. Jayabharathi","orcid":null},"institutions":[{"id":"https://openalex.org/I1343180700","display_name":"Intel (United States)","ror":"https://ror.org/01ek73717","country_code":"US","type":"company","lineage":["https://openalex.org/I1343180700"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Rathish Jayabharathi","raw_affiliation_strings":["Intel, Folsom, CA, USA","Intel Folsom, CA 95630, USA"],"affiliations":[{"raw_affiliation_string":"Intel, Folsom, CA, USA","institution_ids":["https://openalex.org/I1343180700"]},{"raw_affiliation_string":"Intel Folsom, CA 95630, USA","institution_ids":["https://openalex.org/I1343180700"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5075542504"],"corresponding_institution_ids":["https://openalex.org/I110378019"],"apc_list":null,"apc_paid":null,"fwci":0.2455,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.57621795,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"514","last_page":"515"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/monte-carlo-method","display_name":"Monte Carlo method","score":0.7748500108718872},{"id":"https://openalex.org/keywords/path","display_name":"Path (computing)","score":0.6980088949203491},{"id":"https://openalex.org/keywords/probability-density-function","display_name":"Probability density function","score":0.6326354742050171},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6214953660964966},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.5264186263084412},{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"Automatic test pattern generation","score":0.5011332035064697},{"id":"https://openalex.org/keywords/statistical-physics","display_name":"Statistical physics","score":0.39664795994758606},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.30387383699417114},{"id":"https://openalex.org/keywords/statistics","display_name":"Statistics","score":0.20548778772354126},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.17881327867507935},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.10622867941856384}],"concepts":[{"id":"https://openalex.org/C19499675","wikidata":"https://www.wikidata.org/wiki/Q232207","display_name":"Monte Carlo method","level":2,"score":0.7748500108718872},{"id":"https://openalex.org/C2777735758","wikidata":"https://www.wikidata.org/wiki/Q817765","display_name":"Path (computing)","level":2,"score":0.6980088949203491},{"id":"https://openalex.org/C197055811","wikidata":"https://www.wikidata.org/wiki/Q207522","display_name":"Probability density function","level":2,"score":0.6326354742050171},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6214953660964966},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.5264186263084412},{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.5011332035064697},{"id":"https://openalex.org/C121864883","wikidata":"https://www.wikidata.org/wiki/Q677916","display_name":"Statistical physics","level":1,"score":0.39664795994758606},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.30387383699417114},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.20548778772354126},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.17881327867507935},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.10622867941856384},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iccd.2012.6378700","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccd.2012.6378700","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 IEEE 30th International Conference on Computer Design (ICCD)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W2031514768","https://openalex.org/W2104084170","https://openalex.org/W2114584926","https://openalex.org/W2159373619","https://openalex.org/W4243697240"],"related_works":["https://openalex.org/W2131559056","https://openalex.org/W4254560580","https://openalex.org/W2127167802","https://openalex.org/W2080984854","https://openalex.org/W2323083271","https://openalex.org/W2019500818","https://openalex.org/W2767970036","https://openalex.org/W2009690023","https://openalex.org/W2005266888","https://openalex.org/W2561083275"],"abstract_inverted_index":{"A":[0],"Monte":[1,44],"Carlo":[2,45],"based":[3],"approach":[4],"capable":[5],"of":[6,15],"identifying":[7],"the":[8,13,31,42,49,54],"probability":[9,50],"distributions":[10],"that":[11,30,47],"describe":[12],"delay":[14],"every":[16],"sensitizable":[17],"path":[18,21],"in":[19],"a":[20],"implicit":[22],"manner":[23],"is":[24,27,37],"proposed.":[25],"It":[26],"shown":[28],"experimentally":[29],"statistical":[32],"information":[33],"for":[34,53],"all":[35],"paths":[36],"generated":[38],"as":[39,41],"fast":[40],"traditional":[43],"simulation":[46],"identifies":[48],"density":[51],"function":[52],"circuit":[55],"delay.":[56]},"counts_by_year":[{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}