{"id":"https://openalex.org/W1982824648","doi":"https://doi.org/10.1109/iccd.2012.6378678","title":"Locating faults in application-dependent interconnects of SRAM based FPGAs","display_name":"Locating faults in application-dependent interconnects of SRAM based FPGAs","publication_year":2012,"publication_date":"2012-09-01","ids":{"openalex":"https://openalex.org/W1982824648","doi":"https://doi.org/10.1109/iccd.2012.6378678","mag":"1982824648"},"language":"en","primary_location":{"id":"doi:10.1109/iccd.2012.6378678","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccd.2012.6378678","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 IEEE 30th International Conference on Computer Design (ICCD)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5022381918","display_name":"T. Nandha Kumar","orcid":"https://orcid.org/0000-0002-5033-3095"},"institutions":[{"id":"https://openalex.org/I142263535","display_name":"University of Nottingham","ror":"https://ror.org/01ee9ar58","country_code":"GB","type":"education","lineage":["https://openalex.org/I142263535"]},{"id":"https://openalex.org/I155043079","display_name":"University of Nottingham Malaysia Campus","ror":"https://ror.org/04mz9mt17","country_code":"MY","type":"education","lineage":["https://openalex.org/I142263535","https://openalex.org/I155043079"]}],"countries":["GB","MY"],"is_corresponding":false,"raw_author_name":"T. Nandha Kumar","raw_affiliation_strings":["Department of Electrical and Electronic Engineering, University of Nottingham, Semanyih, Malaysia","Department of Electrical and Electronic Engineering, The University of Nottingham, Semenyih, Malaysia#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronic Engineering, University of Nottingham, Semanyih, Malaysia","institution_ids":["https://openalex.org/I155043079"]},{"raw_affiliation_string":"Department of Electrical and Electronic Engineering, The University of Nottingham, Semenyih, Malaysia#TAB#","institution_ids":["https://openalex.org/I142263535"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5036971309","display_name":"Haider A. F. Almurib","orcid":"https://orcid.org/0000-0002-2768-134X"},"institutions":[{"id":"https://openalex.org/I142263535","display_name":"University of Nottingham","ror":"https://ror.org/01ee9ar58","country_code":"GB","type":"education","lineage":["https://openalex.org/I142263535"]},{"id":"https://openalex.org/I155043079","display_name":"University of Nottingham Malaysia Campus","ror":"https://ror.org/04mz9mt17","country_code":"MY","type":"education","lineage":["https://openalex.org/I142263535","https://openalex.org/I155043079"]}],"countries":["GB","MY"],"is_corresponding":false,"raw_author_name":"Haider A. F. Almurib","raw_affiliation_strings":["Department of Electrical and Electronic Engineering, University of Nottingham, Semanyih, Malaysia","Department of Electrical and Electronic Engineering, The University of Nottingham, Semenyih, Malaysia#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronic Engineering, University of Nottingham, Semanyih, Malaysia","institution_ids":["https://openalex.org/I155043079"]},{"raw_affiliation_string":"Department of Electrical and Electronic Engineering, The University of Nottingham, Semenyih, Malaysia#TAB#","institution_ids":["https://openalex.org/I142263535"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5001979328","display_name":"Fabrizio Lombardi","orcid":"https://orcid.org/0000-0003-3152-3245"},"institutions":[{"id":"https://openalex.org/I12912129","display_name":"Northeastern University","ror":"https://ror.org/04t5xt781","country_code":"US","type":"education","lineage":["https://openalex.org/I12912129"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Fabrizio Lombardi","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Northeastern University, Boston, USA","Department of Electrical and Computer Engineering, Northeastern University,Boston,USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Northeastern University, Boston, USA","institution_ids":["https://openalex.org/I12912129"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Northeastern University,Boston,USA","institution_ids":["https://openalex.org/I12912129"]}]}],"institutions":[],"countries_distinct_count":3,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.06772764,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"453","last_page":"459"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6080966591835022},{"id":"https://openalex.org/keywords/bridging","display_name":"Bridging (networking)","score":0.6027258038520813},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5912690162658691},{"id":"https://openalex.org/keywords/disjoint-sets","display_name":"Disjoint sets","score":0.5888930559158325},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.5534392595291138},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.5469316840171814},{"id":"https://openalex.org/keywords/pairwise-comparison","display_name":"Pairwise comparison","score":0.5255338549613953},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.510840117931366},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.4870641529560089},{"id":"https://openalex.org/keywords/subnetwork","display_name":"Subnetwork","score":0.4740217328071594},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.42702847719192505},{"id":"https://openalex.org/keywords/permutation","display_name":"Permutation (music)","score":0.42060935497283936},{"id":"https://openalex.org/keywords/robustness","display_name":"Robustness (evolution)","score":0.417780339717865},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.38554883003234863},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.27832669019699097},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.22210904955863953},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.20495271682739258},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.19202804565429688},{"id":"https://openalex.org/keywords/discrete-mathematics","display_name":"Discrete mathematics","score":0.12040001153945923}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6080966591835022},{"id":"https://openalex.org/C174348530","wikidata":"https://www.wikidata.org/wiki/Q188635","display_name":"Bridging (networking)","level":2,"score":0.6027258038520813},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5912690162658691},{"id":"https://openalex.org/C45340560","wikidata":"https://www.wikidata.org/wiki/Q215382","display_name":"Disjoint sets","level":2,"score":0.5888930559158325},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.5534392595291138},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.5469316840171814},{"id":"https://openalex.org/C184898388","wikidata":"https://www.wikidata.org/wiki/Q1435712","display_name":"Pairwise comparison","level":2,"score":0.5255338549613953},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.510840117931366},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.4870641529560089},{"id":"https://openalex.org/C2780186347","wikidata":"https://www.wikidata.org/wiki/Q11414","display_name":"Subnetwork","level":2,"score":0.4740217328071594},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.42702847719192505},{"id":"https://openalex.org/C21308566","wikidata":"https://www.wikidata.org/wiki/Q7169365","display_name":"Permutation (music)","level":2,"score":0.42060935497283936},{"id":"https://openalex.org/C63479239","wikidata":"https://www.wikidata.org/wiki/Q7353546","display_name":"Robustness (evolution)","level":3,"score":0.417780339717865},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.38554883003234863},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.27832669019699097},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.22210904955863953},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.20495271682739258},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.19202804565429688},{"id":"https://openalex.org/C118615104","wikidata":"https://www.wikidata.org/wiki/Q121416","display_name":"Discrete mathematics","level":1,"score":0.12040001153945923},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0},{"id":"https://openalex.org/C24890656","wikidata":"https://www.wikidata.org/wiki/Q82811","display_name":"Acoustics","level":1,"score":0.0},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0},{"id":"https://openalex.org/C55493867","wikidata":"https://www.wikidata.org/wiki/Q7094","display_name":"Biochemistry","level":1,"score":0.0},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C104317684","wikidata":"https://www.wikidata.org/wiki/Q7187","display_name":"Gene","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iccd.2012.6378678","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccd.2012.6378678","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 IEEE 30th International Conference on Computer Design (ICCD)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W1597088765","https://openalex.org/W1644626461","https://openalex.org/W1881430677","https://openalex.org/W2064130332","https://openalex.org/W2114322273","https://openalex.org/W2129477818","https://openalex.org/W2136841933"],"related_works":["https://openalex.org/W2060724872","https://openalex.org/W2082094785","https://openalex.org/W2202198356","https://openalex.org/W3087203342","https://openalex.org/W2377184161","https://openalex.org/W228984114","https://openalex.org/W4226360758","https://openalex.org/W2090026684","https://openalex.org/W2020053772","https://openalex.org/W2035433397"],"abstract_inverted_index":{"This":[0,19,91],"paper":[1],"presents":[2],"a":[3,56,146],"new":[4],"method":[5,20,73,143],"for":[6,101,133],"locating":[7],"multiple":[8,85,102],"faults":[9,62,121],"in":[10,29,145,149],"an":[11,17],"interconnect":[12,26],"following":[13],"application":[14],"testing":[15],"of":[16,33,35,152],"FPGA.":[18],"utilizes":[21],"conditions":[22],"related":[23],"to":[24,55,83,114],"the":[25,31,44,67,125,138,141,150],"structure":[27],"and":[28,47,80,87,105],"particular,":[30],"presence":[32],"paths":[34],"nets":[36],"that":[37],"are":[38,63],"either":[39],"disjoint":[40],"or":[41],"joint":[42],"between":[43],"primary":[45,51],"input":[46],"at":[48],"least":[49],"one":[50,118],"output.":[52],"They":[53],"yield":[54],"rather":[57],"adaptive":[58],"approach":[59],"by":[60,131],"which":[61],"hierarchically":[64],"located":[65],"using":[66],"walking-1":[68],"test":[69,99,112],"set.":[70],"The":[71],"proposed":[72,142],"is":[74,81],"not":[75],"dependent":[76],"on":[77,137],"net":[78],"ordering":[79],"capable":[82],"locate":[84,115],"stuck-at":[86,103],"pairwise":[88],"bridging":[89,120],"faults.":[90],"process":[92],"requires":[93],"1+log":[94],"<sub":[95,107],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[96,108],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sub>":[97,109],"k":[98,110,123],"configurations":[100,113],"location":[104],"2+2log":[106],"additional":[111],"more":[116],"than":[117],"pair-wise":[119],"(where":[122],"denotes":[124],"maximum":[126],"combinational":[127],"depth).":[128],"As":[129],"validated":[130],"simulation":[132],"benchmark":[134],"circuits":[135],"(implemented":[136],"Xilinx":[139],"Virtex4),":[140],"results":[144],"significant":[147],"reduction":[148],"number":[151],"configurations.":[153]},"counts_by_year":[{"year":2021,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
