{"id":"https://openalex.org/W2124814440","doi":"https://doi.org/10.1109/iccd.2008.4751934","title":"Two dimensional highly associative level-two cache design","display_name":"Two dimensional highly associative level-two cache design","publication_year":2008,"publication_date":"2008-10-01","ids":{"openalex":"https://openalex.org/W2124814440","doi":"https://doi.org/10.1109/iccd.2008.4751934","mag":"2124814440"},"language":"en","primary_location":{"id":"doi:10.1109/iccd.2008.4751934","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccd.2008.4751934","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 IEEE International Conference on Computer Design","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5024465869","display_name":"Chuanjun Zhang","orcid":null},"institutions":[{"id":"https://openalex.org/I75421653","display_name":"University of Missouri\u2013Kansas City","ror":"https://ror.org/01w0d5g70","country_code":"US","type":"education","lineage":["https://openalex.org/I75421653"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Chuanjun Zhang","raw_affiliation_strings":["Department of Computer Science and Electrical Engineering, University of Missouri, Kansas City, USA","Dept. of Comput. Sci. & Electr. Eng., Univ. of Missouri Kansas City, Kansas City, MO"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Electrical Engineering, University of Missouri, Kansas City, USA","institution_ids":["https://openalex.org/I75421653"]},{"raw_affiliation_string":"Dept. of Comput. Sci. & Electr. Eng., Univ. of Missouri Kansas City, Kansas City, MO","institution_ids":["https://openalex.org/I75421653"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5103722231","display_name":"Bing Xue","orcid":null},"institutions":[{"id":"https://openalex.org/I75421653","display_name":"University of Missouri\u2013Kansas City","ror":"https://ror.org/01w0d5g70","country_code":"US","type":"education","lineage":["https://openalex.org/I75421653"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Bing Xue","raw_affiliation_strings":["Department of Computer Science and Electrical Engineering, University of Missouri, Kansas City, USA","Dept. of Comput. Sci. & Electr. Eng., Univ. of Missouri Kansas City, Kansas City, MO"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Electrical Engineering, University of Missouri, Kansas City, USA","institution_ids":["https://openalex.org/I75421653"]},{"raw_affiliation_string":"Dept. of Comput. Sci. & Electr. Eng., Univ. of Missouri Kansas City, Kansas City, MO","institution_ids":["https://openalex.org/I75421653"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I75421653"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"679","last_page":"684"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12326","display_name":"Network Packet Processing and Optimization","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9965999722480774,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8400207757949829},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.811384916305542},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.7319731712341309},{"id":"https://openalex.org/keywords/cache-algorithms","display_name":"Cache algorithms","score":0.7297329306602478},{"id":"https://openalex.org/keywords/cache-invalidation","display_name":"Cache invalidation","score":0.7153878808021545},{"id":"https://openalex.org/keywords/smart-cache","display_name":"Smart Cache","score":0.6454466581344604},{"id":"https://openalex.org/keywords/cache-pollution","display_name":"Cache pollution","score":0.6344236731529236},{"id":"https://openalex.org/keywords/cache-coloring","display_name":"Cache coloring","score":0.614342451095581},{"id":"https://openalex.org/keywords/page-cache","display_name":"Page cache","score":0.5684988498687744},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.4645654261112213},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.4285683035850525},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.22718524932861328}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8400207757949829},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.811384916305542},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.7319731712341309},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.7297329306602478},{"id":"https://openalex.org/C25536678","wikidata":"https://www.wikidata.org/wiki/Q5015977","display_name":"Cache invalidation","level":5,"score":0.7153878808021545},{"id":"https://openalex.org/C167713795","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"Smart Cache","level":5,"score":0.6454466581344604},{"id":"https://openalex.org/C113166858","wikidata":"https://www.wikidata.org/wiki/Q5015981","display_name":"Cache pollution","level":5,"score":0.6344236731529236},{"id":"https://openalex.org/C201148951","wikidata":"https://www.wikidata.org/wiki/Q5015976","display_name":"Cache coloring","level":4,"score":0.614342451095581},{"id":"https://openalex.org/C36340418","wikidata":"https://www.wikidata.org/wiki/Q7124288","display_name":"Page cache","level":5,"score":0.5684988498687744},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.4645654261112213},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.4285683035850525},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.22718524932861328}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iccd.2008.4751934","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccd.2008.4751934","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 IEEE International Conference on Computer Design","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.8999999761581421,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W1987225815","https://openalex.org/W2001180729","https://openalex.org/W2032094184","https://openalex.org/W2108117840","https://openalex.org/W2129440239","https://openalex.org/W2131926352","https://openalex.org/W2154451109"],"related_works":["https://openalex.org/W2133489088","https://openalex.org/W2363769136","https://openalex.org/W2114386333","https://openalex.org/W2126408955","https://openalex.org/W2539712666","https://openalex.org/W2148571123","https://openalex.org/W2396934146","https://openalex.org/W2369103246","https://openalex.org/W2734782074","https://openalex.org/W2115222420"],"abstract_inverted_index":{"High":[0],"associativity":[1,57],"is":[2,16,81,92,108],"important":[3],"for":[4,106],"level-two":[5],"cache":[6,43,87],"designs":[7],"[9].":[8],"Implementing":[9],"CAM-based":[10],"Highly":[11],"Associative":[12],"Caches":[13],"(CAM-HAC),":[14],"however,":[15],"both":[17],"costly":[18],"in":[19,31,83,94],"hardware":[20,104],"and":[21,40,147],"exhibits":[22,154],"poor":[23],"scalability.":[24,35],"We":[25,45],"propose":[26],"to":[27,33,59,85,96,112,163,166],"implement":[28],"the":[29,64,73,98,123,164],"CAM-HAC":[30,115],"macro-blocks":[32],"improve":[34],"Each":[36,53],"macro-block":[37,54],"contains":[38],"128-row":[39],"8-column":[41],"of":[42,63,145],"blocks.":[44],"name":[46],"it":[47],"Two":[48],"dimensional":[49],"Cache,":[50],"or":[51],"T-Cache.":[52],"has":[55],"an":[56,141],"equivalent":[58],"128\u00d78=1024-way.":[60],"Twelve":[61],"bits":[62],"T-Cache\u2019s":[65],"tag":[66,75],"are":[67],"implemented":[68],"by":[69],"using":[70,116],"CAM,":[71],"while":[72,90],"remaining":[74],"uses":[76],"SRAM;":[77],"Furthermore,":[78],"random":[79],"replacement":[80,107],"used":[82,93],"rows":[84],"balance":[86],"sets":[88],"usage":[89],"LRU":[91,117],"columns":[95],"select":[97],"victim":[99],"from":[100],"a":[101,113,126,132,155],"row.":[102],"The":[103,152],"complexity":[105],"reduced":[109],"greatly":[110],"compared":[111],"traditional":[114,133],"solely.":[118],"Experimental":[119],"results":[120],"show":[121],"that":[122],"T-Cache":[124,153],"achieves":[125],"16%":[127],"miss":[128],"rate":[129],"reduction":[130,165],"over":[131],"8-way":[134],"unified":[135],"L2":[136],"cache.":[137],"This":[138],"translates":[139],"into":[140],"average":[142],"IPC":[143],"improvement":[144],"5%":[146],"as":[148,150],"high":[149],"18%.":[151],"4%":[156],"total":[157],"memory":[158],"access-related":[159],"energy":[160],"savings":[161],"due":[162],"applications\u2019":[167],"execution":[168],"time.":[169]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}