{"id":"https://openalex.org/W2112323430","doi":"https://doi.org/10.1109/iccd.2008.4751889","title":"A simple latency tolerant processor","display_name":"A simple latency tolerant processor","publication_year":2008,"publication_date":"2008-10-01","ids":{"openalex":"https://openalex.org/W2112323430","doi":"https://doi.org/10.1109/iccd.2008.4751889","mag":"2112323430"},"language":"en","primary_location":{"id":"doi:10.1109/iccd.2008.4751889","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccd.2008.4751889","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 IEEE International Conference on Computer Design","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5005648034","display_name":"Satyanarayana Nekkalapu","orcid":null},"institutions":[{"id":"https://openalex.org/I98635879","display_name":"American University of Beirut","ror":"https://ror.org/04pznsd21","country_code":"LB","type":"education","lineage":["https://openalex.org/I98635879"]},{"id":"https://openalex.org/I126345244","display_name":"Portland State University","ror":"https://ror.org/00yn2fy02","country_code":"US","type":"education","lineage":["https://openalex.org/I126345244"]}],"countries":["LB","US"],"is_corresponding":true,"raw_author_name":"Satyanarayana Nekkalapu","raw_affiliation_strings":["Electrical and Computer Engineering, Portland State University, USA","Electr. & Comput. Eng., American Univ. of Beirut, Beirut"],"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering, Portland State University, USA","institution_ids":["https://openalex.org/I126345244"]},{"raw_affiliation_string":"Electr. & Comput. Eng., American Univ. of Beirut, Beirut","institution_ids":["https://openalex.org/I98635879"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5065922595","display_name":"Haitham Akkary","orcid":null},"institutions":[{"id":"https://openalex.org/I98635879","display_name":"American University of Beirut","ror":"https://ror.org/04pznsd21","country_code":"LB","type":"education","lineage":["https://openalex.org/I98635879"]}],"countries":["LB"],"is_corresponding":false,"raw_author_name":"Haitham Akkary","raw_affiliation_strings":["Electrical and Computer Engineering, American University of Beirut, Lebanon","Electr. & Comput. Eng., American Univ. of Beirut, Beirut"],"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering, American University of Beirut, Lebanon","institution_ids":["https://openalex.org/I98635879"]},{"raw_affiliation_string":"Electr. & Comput. Eng., American Univ. of Beirut, Beirut","institution_ids":["https://openalex.org/I98635879"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5025989918","display_name":"Komal Jothi","orcid":null},"institutions":[{"id":"https://openalex.org/I126345244","display_name":"Portland State University","ror":"https://ror.org/00yn2fy02","country_code":"US","type":"education","lineage":["https://openalex.org/I126345244"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Komal Jothi","raw_affiliation_strings":["Electrical and Computer Engineering, Portland State University, USA","Electr. & Comput. Eng., Portland State Univ., Portland, OR"],"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering, Portland State University, USA","institution_ids":["https://openalex.org/I126345244"]},{"raw_affiliation_string":"Electr. & Comput. Eng., Portland State Univ., Portland, OR","institution_ids":["https://openalex.org/I126345244"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5049716963","display_name":"Renjith Retnamma","orcid":null},"institutions":[{"id":"https://openalex.org/I126345244","display_name":"Portland State University","ror":"https://ror.org/00yn2fy02","country_code":"US","type":"education","lineage":["https://openalex.org/I126345244"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Renjith Retnamma","raw_affiliation_strings":["Electrical and Computer Engineering, Portland State University, USA","Electr. & Comput. Eng., Portland State Univ., Portland, OR"],"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering, Portland State University, USA","institution_ids":["https://openalex.org/I126345244"]},{"raw_affiliation_string":"Electr. & Comput. Eng., Portland State Univ., Portland, OR","institution_ids":["https://openalex.org/I126345244"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5082437433","display_name":"Xiaoyu Song","orcid":"https://orcid.org/0000-0002-6583-9400"},"institutions":[{"id":"https://openalex.org/I126345244","display_name":"Portland State University","ror":"https://ror.org/00yn2fy02","country_code":"US","type":"education","lineage":["https://openalex.org/I126345244"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Xiaoyu Song","raw_affiliation_strings":["Electrical and Computer Engineering, Portland State University, USA","Electr. & Comput. Eng., Portland State Univ., Portland, OR"],"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering, Portland State University, USA","institution_ids":["https://openalex.org/I126345244"]},{"raw_affiliation_string":"Electr. & Comput. Eng., Portland State Univ., Portland, OR","institution_ids":["https://openalex.org/I126345244"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5005648034"],"corresponding_institution_ids":["https://openalex.org/I126345244","https://openalex.org/I98635879"],"apc_list":null,"apc_paid":null,"fwci":2.7729,"has_fulltext":false,"cited_by_count":21,"citation_normalized_percentile":{"value":0.91056404,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"384","last_page":"389"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9975000023841858,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8386971354484558},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.632145345211029},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.5615276098251343},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5583413243293762},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4975626766681671},{"id":"https://openalex.org/keywords/out-of-order-execution","display_name":"Out-of-order execution","score":0.48565995693206787},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.4437807500362396},{"id":"https://openalex.org/keywords/multithreading","display_name":"Multithreading","score":0.4285699129104614},{"id":"https://openalex.org/keywords/microarchitecture","display_name":"Microarchitecture","score":0.4187665581703186},{"id":"https://openalex.org/keywords/thread","display_name":"Thread (computing)","score":0.3822990953922272},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3357146680355072},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.24805819988250732}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8386971354484558},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.632145345211029},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.5615276098251343},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5583413243293762},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4975626766681671},{"id":"https://openalex.org/C1793878","wikidata":"https://www.wikidata.org/wiki/Q1153762","display_name":"Out-of-order execution","level":2,"score":0.48565995693206787},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.4437807500362396},{"id":"https://openalex.org/C201410400","wikidata":"https://www.wikidata.org/wiki/Q1064412","display_name":"Multithreading","level":3,"score":0.4285699129104614},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.4187665581703186},{"id":"https://openalex.org/C138101251","wikidata":"https://www.wikidata.org/wiki/Q213092","display_name":"Thread (computing)","level":2,"score":0.3822990953922272},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3357146680355072},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.24805819988250732},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iccd.2008.4751889","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccd.2008.4751889","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 IEEE International Conference on Computer Design","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.49000000953674316,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":34,"referenced_works":["https://openalex.org/W28827246","https://openalex.org/W1550899637","https://openalex.org/W1983096721","https://openalex.org/W2005646196","https://openalex.org/W2007714612","https://openalex.org/W2014271889","https://openalex.org/W2019674193","https://openalex.org/W2061894527","https://openalex.org/W2071568619","https://openalex.org/W2094754158","https://openalex.org/W2099786221","https://openalex.org/W2118859527","https://openalex.org/W2118896605","https://openalex.org/W2119786518","https://openalex.org/W2120628323","https://openalex.org/W2123608497","https://openalex.org/W2146173591","https://openalex.org/W2149379863","https://openalex.org/W2168307289","https://openalex.org/W2542426564","https://openalex.org/W4232096869","https://openalex.org/W4236345830","https://openalex.org/W4242484660","https://openalex.org/W4243665729","https://openalex.org/W4244763500","https://openalex.org/W4246178214","https://openalex.org/W4250884001","https://openalex.org/W4255052811","https://openalex.org/W4285719527","https://openalex.org/W4292169167","https://openalex.org/W6601171042","https://openalex.org/W6633084194","https://openalex.org/W6651866598","https://openalex.org/W6677960398"],"related_works":["https://openalex.org/W2115561485","https://openalex.org/W1985089255","https://openalex.org/W2153202644","https://openalex.org/W2010970156","https://openalex.org/W2482815832","https://openalex.org/W2105895556","https://openalex.org/W2733115356","https://openalex.org/W2377593213","https://openalex.org/W3149034384","https://openalex.org/W2097410296"],"abstract_inverted_index":{"The":[0,156],"advent":[1],"of":[2,8,15,43,76,85,159,166,168],"multi-core":[3,116],"processors":[4,17],"and":[5,32,46,111,139,150,153],"the":[6,41,53,74,92,115,188],"emergence":[7],"new":[9],"parallel":[10],"applications":[11],"that":[12,65,102,125],"take":[13],"advantage":[14],"such":[16,143,182],"pose":[18],"difficult":[19],"challenges":[20],"to":[21,88,164,184],"designers.":[22],"With":[23],"relatively":[24],"constant":[25],"die":[26,94,190],"sizes,":[27],"limited":[28],"on":[29,38,91,172,187],"chip":[30,39],"cache,":[31],"scarce":[33],"pin":[34],"bandwidth,":[35],"more":[36,181],"cores":[37,87,183],"reduces":[40],"amount":[42],"available":[44],"cache":[45,79,169],"bus":[47],"bandwidth":[48],"per":[49],"core,":[50,177],"therefore":[51],"exacerbating":[52],"memory":[54,127],"wall":[55],"problem":[56],"[24].":[57],"How":[58],"can":[59],"a":[60,63,67,121,173],"designer":[61],"build":[62],"processor":[64],"provides":[66,162],"core":[68],"with":[69,194],"good":[70],"single-thread":[71],"performance":[72],"in":[73],"presence":[75],"long":[77],"latency":[78,99,128,171],"misses,":[80],"while":[81],"enabling":[82],"as":[83,144],"many":[84,180],"these":[86],"be":[89,185],"placed":[90],"same":[93,189],"for":[95,114],"high":[96],"throughput.":[97],"Conventional":[98],"tolerant":[100],"architectures":[101],"use":[103],"out-of-order":[104,133,196],"superscalar":[105,197],"execution":[106,134],"have":[107],"become":[108],"too":[109],"complex":[110,132],"power":[112,140],"hungry":[113,141],"era.":[117],"Instead,":[118],"we":[119],"present":[120],"simple,":[122],"non-blocking":[123,157],"architecture":[124,161],"achieves":[126],"tolerance":[129,163],"without":[130],"requiring":[131],"hardware":[135],"or":[136],"large,":[137],"cycle-critical":[138],"structures,":[142],"dynamic":[145],"schedulers,":[146],"fully":[147],"associative":[148],"load":[149],"store":[151],"queues,":[152],"reorder":[154],"buffers.":[155],"property":[158],"this":[160],"hundreds":[165],"cycles":[167],"miss":[170],"simple":[174],"in-order":[175],"issue":[176],"thus":[178],"allowing":[179],"integrated":[186],"than":[191],"is":[192],"possible":[193],"conventional":[195],"architecture.":[198]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2018,"cited_by_count":3},{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":2},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
