{"id":"https://openalex.org/W2107944009","doi":"https://doi.org/10.1109/iccd.2008.4751862","title":"Comparative analysis of NBTI effects on low power and high performance flip-flops","display_name":"Comparative analysis of NBTI effects on low power and high performance flip-flops","publication_year":2008,"publication_date":"2008-10-01","ids":{"openalex":"https://openalex.org/W2107944009","doi":"https://doi.org/10.1109/iccd.2008.4751862","mag":"2107944009"},"language":"en","primary_location":{"id":"doi:10.1109/iccd.2008.4751862","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccd.2008.4751862","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 IEEE International Conference on Computer Design","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5053712998","display_name":"K. K. Ramakrishnan","orcid":"https://orcid.org/0000-0003-1849-5155"},"institutions":[{"id":"https://openalex.org/I130769515","display_name":"Pennsylvania State University","ror":"https://ror.org/04p491231","country_code":"US","type":"education","lineage":["https://openalex.org/I130769515"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"K. Ramakrishnan","raw_affiliation_strings":["Microsystems Design Laboratory (MDL), Department of Computer Science and Engineering, The Pennsylvania State University, University Park, 16802, USA","Department of Computer Science and Engineering Pennsylvania State University University Park, PA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Microsystems Design Laboratory (MDL), Department of Computer Science and Engineering, The Pennsylvania State University, University Park, 16802, USA","institution_ids":["https://openalex.org/I130769515"]},{"raw_affiliation_string":"Department of Computer Science and Engineering Pennsylvania State University University Park, PA","institution_ids":["https://openalex.org/I130769515"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5074673809","display_name":"Xiaokun Wu","orcid":"https://orcid.org/0000-0002-9741-0713"},"institutions":[{"id":"https://openalex.org/I130769515","display_name":"Pennsylvania State University","ror":"https://ror.org/04p491231","country_code":"US","type":"education","lineage":["https://openalex.org/I130769515"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"X. Wu","raw_affiliation_strings":["Microsystems Design Laboratory (MDL), Department of Computer Science and Engineering, The Pennsylvania State University, University Park, 16802, USA","Department of Computer Science and Engineering Pennsylvania State University University Park, PA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Microsystems Design Laboratory (MDL), Department of Computer Science and Engineering, The Pennsylvania State University, University Park, 16802, USA","institution_ids":["https://openalex.org/I130769515"]},{"raw_affiliation_string":"Department of Computer Science and Engineering Pennsylvania State University University Park, PA","institution_ids":["https://openalex.org/I130769515"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103547260","display_name":"N. Vijaykrishnan","orcid":null},"institutions":[{"id":"https://openalex.org/I130769515","display_name":"Pennsylvania State University","ror":"https://ror.org/04p491231","country_code":"US","type":"education","lineage":["https://openalex.org/I130769515"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"N. Vijaykrishnan","raw_affiliation_strings":["Microsystems Design Laboratory (MDL), Department of Computer Science and Engineering, The Pennsylvania State University, University Park, 16802, USA","Department of Computer Science and Engineering Pennsylvania State University University Park, PA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Microsystems Design Laboratory (MDL), Department of Computer Science and Engineering, The Pennsylvania State University, University Park, 16802, USA","institution_ids":["https://openalex.org/I130769515"]},{"raw_affiliation_string":"Department of Computer Science and Engineering Pennsylvania State University University Park, PA","institution_ids":["https://openalex.org/I130769515"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100385336","display_name":"Yuan Xie","orcid":"https://orcid.org/0000-0003-2093-1788"},"institutions":[{"id":"https://openalex.org/I130769515","display_name":"Pennsylvania State University","ror":"https://ror.org/04p491231","country_code":"US","type":"education","lineage":["https://openalex.org/I130769515"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Y. Xie","raw_affiliation_strings":["Microsystems Design Laboratory (MDL), Department of Computer Science and Engineering, The Pennsylvania State University, University Park, 16802, USA","Department of Computer Science and Engineering Pennsylvania State University University Park, PA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Microsystems Design Laboratory (MDL), Department of Computer Science and Engineering, The Pennsylvania State University, University Park, 16802, USA","institution_ids":["https://openalex.org/I130769515"]},{"raw_affiliation_string":"Department of Computer Science and Engineering Pennsylvania State University University Park, PA","institution_ids":["https://openalex.org/I130769515"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I130769515"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":20,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"200","last_page":"205"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/negative-bias-temperature-instability","display_name":"Negative-bias temperature instability","score":0.8582818508148193},{"id":"https://openalex.org/keywords/flops","display_name":"FLOPS","score":0.6683462858200073},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.571666419506073},{"id":"https://openalex.org/keywords/degradation","display_name":"Degradation (telecommunications)","score":0.5520994663238525},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.5115943551063538},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5005004405975342},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4972684681415558},{"id":"https://openalex.org/keywords/flip-flop","display_name":"Flip-flop","score":0.47759294509887695},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4564923644065857},{"id":"https://openalex.org/keywords/threshold-voltage","display_name":"Threshold voltage","score":0.44050168991088867},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.3612254559993744},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.27402666211128235},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.24828526377677917},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.23115068674087524},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.12107044458389282}],"concepts":[{"id":"https://openalex.org/C557185","wikidata":"https://www.wikidata.org/wiki/Q6987194","display_name":"Negative-bias temperature instability","level":5,"score":0.8582818508148193},{"id":"https://openalex.org/C3826847","wikidata":"https://www.wikidata.org/wiki/Q188768","display_name":"FLOPS","level":2,"score":0.6683462858200073},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.571666419506073},{"id":"https://openalex.org/C2779679103","wikidata":"https://www.wikidata.org/wiki/Q5251805","display_name":"Degradation (telecommunications)","level":2,"score":0.5520994663238525},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.5115943551063538},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5005004405975342},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4972684681415558},{"id":"https://openalex.org/C2781007278","wikidata":"https://www.wikidata.org/wiki/Q183406","display_name":"Flip-flop","level":3,"score":0.47759294509887695},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4564923644065857},{"id":"https://openalex.org/C195370968","wikidata":"https://www.wikidata.org/wiki/Q1754002","display_name":"Threshold voltage","level":4,"score":0.44050168991088867},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.3612254559993744},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.27402666211128235},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.24828526377677917},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.23115068674087524},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.12107044458389282},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iccd.2008.4751862","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccd.2008.4751862","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 IEEE International Conference on Computer Design","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.7400000095367432,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W1502390497","https://openalex.org/W1864700546","https://openalex.org/W1991891926","https://openalex.org/W2068316116","https://openalex.org/W2069345435","https://openalex.org/W2099679924","https://openalex.org/W2103792078","https://openalex.org/W2108880814","https://openalex.org/W2109195618","https://openalex.org/W2113115586","https://openalex.org/W2122757690","https://openalex.org/W2137616964","https://openalex.org/W2144726910","https://openalex.org/W2149778532","https://openalex.org/W2150375993","https://openalex.org/W2156064231","https://openalex.org/W2164047446","https://openalex.org/W2171649152","https://openalex.org/W4233474994","https://openalex.org/W4234640396"],"related_works":["https://openalex.org/W2944990515","https://openalex.org/W2262031297","https://openalex.org/W2942040471","https://openalex.org/W2028220610","https://openalex.org/W2573726612","https://openalex.org/W2088008649","https://openalex.org/W2166033074","https://openalex.org/W2036808971","https://openalex.org/W2184065029","https://openalex.org/W2733322820"],"abstract_inverted_index":{"Mitigating":[0],"the":[1,28,59,64,67,74,79,102],"circuit":[2,31],"aging":[3,32],"effect":[4],"in":[5,47],"digital":[6],"circuits":[7],"has":[8],"become":[9],"a":[10,41],"very":[11],"important":[12,30],"concern":[13],"for":[14],"current":[15],"and":[16,50,88,98],"future":[17],"technology":[18],"nodes.":[19],"Negative":[20],"Bias":[21],"Temperature":[22],"Instability":[23],"(NBTI)":[24],"is":[25],"one":[26],"of":[27,55,66,76,82,85],"most":[29],"mechanisms,":[33],"which":[34,100],"can":[35],"incur":[36],"timing":[37,80],"errors.":[38],"Flip-flops":[39],"play":[40],"vital":[42],"role":[43],"as":[44,94],"storage":[45],"elements":[46],"pipelined":[48],"architectures":[49],"are":[51,105],"prone":[52],"to":[53],"effects":[54,75],"aging.":[56],"NBTI":[57,77],"increases":[58],"transistor":[60],"threshold":[61],"voltage,":[62],"affecting":[63],"performance":[65,90],"chip.":[68],"In":[69],"this":[70],"paper,":[71],"we":[72],"study":[73],"on":[78],"characteristics":[81],"different":[83],"types":[84],"low":[86],"power":[87],"high":[89],"flip-flops.":[91],"Factors":[92],"such":[93],"input":[95],"data":[96],"probability":[97],"temperature":[99],"affect":[101],"degradation":[103],"rate":[104],"also":[106],"analyzed.":[107]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":4},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2013,"cited_by_count":3},{"year":2012,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}