{"id":"https://openalex.org/W2171658874","doi":"https://doi.org/10.1109/iccd.2008.4751848","title":"Temperature-aware clock tree synthesis considering spatiotemporal hot spot correlations","display_name":"Temperature-aware clock tree synthesis considering spatiotemporal hot spot correlations","publication_year":2008,"publication_date":"2008-10-01","ids":{"openalex":"https://openalex.org/W2171658874","doi":"https://doi.org/10.1109/iccd.2008.4751848","mag":"2171658874"},"language":"en","primary_location":{"id":"doi:10.1109/iccd.2008.4751848","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccd.2008.4751848","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 IEEE International Conference on Computer Design","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5035272808","display_name":"ChunChen Liu","orcid":null},"institutions":[{"id":"https://openalex.org/I36258959","display_name":"University of California San Diego","ror":"https://ror.org/0168r3w48","country_code":"US","type":"education","lineage":["https://openalex.org/I36258959"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"ChunChen Liu","raw_affiliation_strings":["Electrical and Computer Engineering Department, University of California, San Diego, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering Department, University of California, San Diego, USA","institution_ids":["https://openalex.org/I36258959"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5023241047","display_name":"Junjie Su","orcid":"https://orcid.org/0000-0001-6278-3918"},"institutions":[{"id":"https://openalex.org/I36258959","display_name":"University of California San Diego","ror":"https://ror.org/0168r3w48","country_code":"US","type":"education","lineage":["https://openalex.org/I36258959"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Junjie Su","raw_affiliation_strings":["Electrical and Computer Engineering Department, University of California, San Diego, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electrical and Computer Engineering Department, University of California, San Diego, USA","institution_ids":["https://openalex.org/I36258959"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5000141831","display_name":"Yiyu Shi","orcid":"https://orcid.org/0000-0002-6788-9823"},"institutions":[{"id":"https://openalex.org/I161318765","display_name":"University of California, Los Angeles","ror":"https://ror.org/046rm7j60","country_code":"US","type":"education","lineage":["https://openalex.org/I161318765"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Yiyu Shi","raw_affiliation_strings":["Electrical Engineering Department, University of California, Los Angeles, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Electrical Engineering Department, University of California, Los Angeles, USA","institution_ids":["https://openalex.org/I161318765"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.3392,"has_fulltext":false,"cited_by_count":15,"citation_normalized_percentile":{"value":0.68097165,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"107","last_page":"113"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/skew","display_name":"Skew","score":0.8399869203567505},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5797712802886963},{"id":"https://openalex.org/keywords/clock-skew","display_name":"Clock skew","score":0.5044828653335571},{"id":"https://openalex.org/keywords/embedding","display_name":"Embedding","score":0.4507106840610504},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.4218848645687103},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3933870792388916},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.37285101413726807},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.37145429849624634},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.25663673877716064},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.07307189702987671},{"id":"https://openalex.org/keywords/combinatorics","display_name":"Combinatorics","score":0.07122001051902771}],"concepts":[{"id":"https://openalex.org/C43711488","wikidata":"https://www.wikidata.org/wiki/Q7534783","display_name":"Skew","level":2,"score":0.8399869203567505},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5797712802886963},{"id":"https://openalex.org/C60501442","wikidata":"https://www.wikidata.org/wiki/Q4382014","display_name":"Clock skew","level":4,"score":0.5044828653335571},{"id":"https://openalex.org/C41608201","wikidata":"https://www.wikidata.org/wiki/Q980509","display_name":"Embedding","level":2,"score":0.4507106840610504},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.4218848645687103},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3933870792388916},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.37285101413726807},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.37145429849624634},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.25663673877716064},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.07307189702987671},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.07122001051902771},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/iccd.2008.4751848","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccd.2008.4751848","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2008 IEEE International Conference on Computer Design","raw_type":"proceedings-article"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.1007.7206","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.1007.7206","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://iccd.et.tudelft.nl/2008/proceedings/107liu.pdf","raw_type":"text"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.1012.7065","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.1012.7065","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"https://www.researchgate.net/profile/Chunchen_Liu2/publication/221634026_Temperature-aware_clock_tree_synthesis_considering_spatiotemporal_hot_spot_correlations/links/54cfa4db0cf298d65664f7cf.pdf","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320332603","display_name":"University of California, San Diego","ror":"https://ror.org/0168r3w48"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W1978125595","https://openalex.org/W2002982872","https://openalex.org/W2026851806","https://openalex.org/W2105041898","https://openalex.org/W2127218421","https://openalex.org/W2128237591","https://openalex.org/W2132816157","https://openalex.org/W2136768070","https://openalex.org/W2140153041","https://openalex.org/W2141923369","https://openalex.org/W2148609278","https://openalex.org/W2149599481","https://openalex.org/W2152165066","https://openalex.org/W2153580689","https://openalex.org/W2157133114","https://openalex.org/W4231444968","https://openalex.org/W4237096326","https://openalex.org/W4238535529","https://openalex.org/W6651062404","https://openalex.org/W6678914141"],"related_works":["https://openalex.org/W2043687377","https://openalex.org/W2090831842","https://openalex.org/W4294811666","https://openalex.org/W2366036463","https://openalex.org/W2162140253","https://openalex.org/W2101586998","https://openalex.org/W2100136723","https://openalex.org/W2065505322","https://openalex.org/W2003454554","https://openalex.org/W2569689832"],"abstract_inverted_index":{"Temperature":[0],"variation":[1,108,124],"in":[2,71,83],"microprocessors":[3],"is":[4,38],"a":[5,11,92],"workload":[6],"dependent":[7],"problem.":[8],"In":[9],"such":[10],"design,":[12],"the":[13,129,145,158,165],"clock":[14,28,116,139],"skew":[15,45,82,104,107,123,168],"should":[16],"be":[17],"minimized":[18],"with":[19,73,86,113,128],"respect":[20],"to":[21,150,170],"temperature":[22,35,75,89,152],"variation.":[23,36,46],"Existing":[24],"work":[25],"has":[26],"studied":[27],"tree":[29,68,84,95,117],"embedding":[30,57,66],"perturbation":[31],"considering":[32],"time":[33],"variant":[34],"There":[37],"no":[39],"existing":[40,114,136],"method":[41,98,132],"that":[42],"can":[43,99],"reduce":[44,81,100],"This":[47],"paper":[48],"develops":[49],"an":[50],"efficient":[51],"yet":[52],"effective":[53],"simultaneous":[54],"hotspot":[55,65],"avoid":[56,67],"and":[58,77,135,142,174],"thermal":[59,78,137],"aware":[60,79,138],"routing":[61,80],"(TMST)":[62],"method,":[63,118],"where":[64],"topology":[69],"located":[70],"area":[72],"high":[74],"possibility":[76],"path":[85],"more":[87],"smooth":[88],"area.":[90],"With":[91,144],"thermally":[93],"tolerable":[94],"structure,":[96],"our":[97,119,154],"not":[101],"only":[102],"delay":[103],"but":[105],"also":[106,156],"(skew":[109],"violation":[110],"range).":[111],"Compared":[112],"temperature-aware":[115],"TMST":[120,155,163],"solution":[121],"reduces":[122,164],"by":[125],"2X":[126],"compared":[127],"greedy-DME":[130],"(GDME)":[131],"of":[133],"Edahiro":[134],"synthesis":[140],"TACO":[141],"PECO.":[143],"scale":[146],"from":[147],"100":[148],"down":[149],"1":[151],"maps,":[153],"guarantees":[157],"smallest":[159],"wire":[160],"length":[161],"overflow.":[162],"worst":[166],"case":[167],"up":[169],"4X":[171],"than":[172,176],"PECO":[173],"5X":[175],"TACO.":[177]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":2},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":2},{"year":2013,"cited_by_count":2},{"year":2012,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
