{"id":"https://openalex.org/W1484446818","doi":"https://doi.org/10.1109/iccd.2004.1347969","title":"Coping with the variability of combinational logic delays","display_name":"Coping with the variability of combinational logic delays","publication_year":2004,"publication_date":"2004-11-08","ids":{"openalex":"https://openalex.org/W1484446818","doi":"https://doi.org/10.1109/iccd.2004.1347969","mag":"1484446818"},"language":"en","primary_location":{"id":"doi:10.1109/iccd.2004.1347969","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccd.2004.1347969","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE International Conference on Computer Design: VLSI in Computers and Processors, 2004. ICCD 2004. Proceedings.","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":true,"oa_status":"green","oa_url":"http://hdl.handle.net/2117/130966","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5031451250","display_name":"Jordi Cortadella","orcid":"https://orcid.org/0000-0001-8114-250X"},"institutions":[{"id":"https://openalex.org/I9617848","display_name":"Universitat Polit\u00e8cnica de Catalunya","ror":"https://ror.org/03mb6wj31","country_code":"ES","type":"education","lineage":["https://openalex.org/I9617848"]}],"countries":["ES"],"is_corresponding":true,"raw_author_name":"J. Cortadella","raw_affiliation_strings":["Universitat Polilt\u00e8cnica de Catalunya, Barcelona, Spain","Univ. Politecnica de Catalunya, Barcelona, Spain"],"affiliations":[{"raw_affiliation_string":"Universitat Polilt\u00e8cnica de Catalunya, Barcelona, Spain","institution_ids":["https://openalex.org/I9617848"]},{"raw_affiliation_string":"Univ. Politecnica de Catalunya, Barcelona, Spain","institution_ids":["https://openalex.org/I9617848"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5069752974","display_name":"A. Kondratyev","orcid":null},"institutions":[{"id":"https://openalex.org/I148283060","display_name":"Lawrence Berkeley National Laboratory","ror":"https://ror.org/02jbv0t02","country_code":"US","type":"facility","lineage":["https://openalex.org/I1330989302","https://openalex.org/I148283060","https://openalex.org/I39565521"]},{"id":"https://openalex.org/I66217453","display_name":"Cadence Design Systems (United States)","ror":"https://ror.org/04w8xa018","country_code":"US","type":"company","lineage":["https://openalex.org/I66217453"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"A. Kondratyev","raw_affiliation_strings":["Cadence Berkeley Laboratories, Berkeley, CA, USA","Cadence Berkeley Laboratories, Berkeley CA"],"affiliations":[{"raw_affiliation_string":"Cadence Berkeley Laboratories, Berkeley, CA, USA","institution_ids":["https://openalex.org/I66217453","https://openalex.org/I148283060"]},{"raw_affiliation_string":"Cadence Berkeley Laboratories, Berkeley CA","institution_ids":["https://openalex.org/I148283060"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5050365912","display_name":"Luciano Lavagno","orcid":"https://orcid.org/0000-0002-9762-6522"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Polytechnic University of Turin","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"L. Lavagno","raw_affiliation_strings":["Politenico di Torino, Torino, Italy","Politenico di Torino, Italy#TAB#"],"affiliations":[{"raw_affiliation_string":"Politenico di Torino, Torino, Italy","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"Politenico di Torino, Italy#TAB#","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5103066371","display_name":"Christos Sotiriou","orcid":"https://orcid.org/0000-0001-9318-474X"},"institutions":[{"id":"https://openalex.org/I4210121775","display_name":"FORTH Institute of Computer Science","ror":"https://ror.org/02tf48g55","country_code":"GR","type":"facility","lineage":["https://openalex.org/I4210121775","https://openalex.org/I8901234"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"C. Sotiriou","raw_affiliation_strings":["ICS-FORTH, Crete, Greece","ICS-FORTH, Crete, Greece#TAB#"],"affiliations":[{"raw_affiliation_string":"ICS-FORTH, Crete, Greece","institution_ids":["https://openalex.org/I4210121775"]},{"raw_affiliation_string":"ICS-FORTH, Crete, Greece#TAB#","institution_ids":["https://openalex.org/I4210121775"]}]}],"institutions":[],"countries_distinct_count":4,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5031451250"],"corresponding_institution_ids":["https://openalex.org/I9617848"],"apc_list":null,"apc_paid":null,"fwci":3.1755,"has_fulltext":false,"cited_by_count":69,"citation_normalized_percentile":{"value":0.90813584,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":90,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"505","last_page":"508"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/combinational-logic","display_name":"Combinational logic","score":0.7374701499938965},{"id":"https://openalex.org/keywords/coping","display_name":"Coping (psychology)","score":0.5905806422233582},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5531601905822754},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.42892634868621826},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.3946307897567749},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.39081794023513794},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.29539546370506287},{"id":"https://openalex.org/keywords/psychology","display_name":"Psychology","score":0.24287036061286926},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.21570968627929688},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.15174713730812073},{"id":"https://openalex.org/keywords/clinical-psychology","display_name":"Clinical psychology","score":0.12418219447135925}],"concepts":[{"id":"https://openalex.org/C81409106","wikidata":"https://www.wikidata.org/wiki/Q76505","display_name":"Combinational logic","level":3,"score":0.7374701499938965},{"id":"https://openalex.org/C73282008","wikidata":"https://www.wikidata.org/wiki/Q1759895","display_name":"Coping (psychology)","level":2,"score":0.5905806422233582},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5531601905822754},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.42892634868621826},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.3946307897567749},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.39081794023513794},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.29539546370506287},{"id":"https://openalex.org/C15744967","wikidata":"https://www.wikidata.org/wiki/Q9418","display_name":"Psychology","level":0,"score":0.24287036061286926},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.21570968627929688},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.15174713730812073},{"id":"https://openalex.org/C70410870","wikidata":"https://www.wikidata.org/wiki/Q199906","display_name":"Clinical psychology","level":1,"score":0.12418219447135925}],"mesh":[],"locations_count":4,"locations":[{"id":"doi:10.1109/iccd.2004.1347969","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccd.2004.1347969","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE International Conference on Computer Design: VLSI in Computers and Processors, 2004. ICCD 2004. Proceedings.","raw_type":"proceedings-article"},{"id":"pmh:oai:recercat.cat:2072/352493","is_oa":true,"landing_page_url":"http://hdl.handle.net/2117/130966","pdf_url":null,"source":{"id":"https://openalex.org/S4306402147","display_name":"RECERCAT (Consorci de Serveis Universitaris de Catalunya)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I4210090028","host_organization_name":"Consorci de Serveis Universitaris de Catalunya","host_organization_lineage":["https://openalex.org/I4210090028"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"acceptedVersion","is_accepted":true,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/publishedVersion"},{"id":"pmh:oai:CiteSeerX.psu:10.1.1.103.969","is_oa":false,"landing_page_url":"http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.103.969","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"http://www.ee.technion.ac.il/courses/048878/048879-206/Cortadella-CD4CLdelayVariations-ICCAD04.pdf","raw_type":"text"},{"id":"pmh:oai:porto.polito.it:1667403","is_oa":false,"landing_page_url":"http://porto.polito.it/1667403/","pdf_url":null,"source":{"id":"https://openalex.org/S4306402038","display_name":"PORTO Publications Open Repository TOrino (Politecnico di Torino)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I177477856","host_organization_name":"Politecnico di Torino","host_organization_lineage":["https://openalex.org/I177477856"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/conferenceObject"}],"best_oa_location":{"id":"pmh:oai:recercat.cat:2072/352493","is_oa":true,"landing_page_url":"http://hdl.handle.net/2117/130966","pdf_url":null,"source":{"id":"https://openalex.org/S4306402147","display_name":"RECERCAT (Consorci de Serveis Universitaris de Catalunya)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I4210090028","host_organization_name":"Consorci de Serveis Universitaris de Catalunya","host_organization_lineage":["https://openalex.org/I4210090028"],"host_organization_lineage_names":[],"type":"repository"},"license":"other-oa","license_id":"https://openalex.org/licenses/other-oa","version":"acceptedVersion","is_accepted":true,"is_published":false,"raw_source_name":"","raw_type":"info:eu-repo/semantics/publishedVersion"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W196629420","https://openalex.org/W1484446818","https://openalex.org/W2033724727","https://openalex.org/W2052771421","https://openalex.org/W2106950603","https://openalex.org/W2114615162","https://openalex.org/W2115557582","https://openalex.org/W2149966501","https://openalex.org/W2154582989","https://openalex.org/W2157210245","https://openalex.org/W2476901852","https://openalex.org/W2911717499","https://openalex.org/W3146410802","https://openalex.org/W4231905827","https://openalex.org/W4256596352"],"related_works":["https://openalex.org/W3167886223","https://openalex.org/W2098694303","https://openalex.org/W2118365745","https://openalex.org/W3217430545","https://openalex.org/W1493505771","https://openalex.org/W1621928919","https://openalex.org/W4299458603","https://openalex.org/W2110487025","https://openalex.org/W2074526596","https://openalex.org/W4242010157"],"abstract_inverted_index":{"This":[0],"paper":[1],"proposes":[2],"a":[3,7,56,79],"technique":[4],"for":[5],"creating":[6],"combinational":[8],"logic":[9],"network":[10],"with":[11],"an":[12,68],"output":[13],"that":[14],"signals":[15],"when":[16],"all":[17],"other":[18],"outputs":[19],"have":[20],"stabilized.":[21],"The":[22],"method":[23],"is":[24],"based":[25],"on":[26,78],"dual-rail":[27],"encoding,":[28],"and":[29,34,37,66],"guarantees":[30],"low":[31],"timing":[32],"overhead":[33],"reasonable":[35],"area":[36],"power":[38],"overhead.":[39],"We":[40,74],"discuss":[41],"various":[42],"scenarios":[43],"in":[44],"which":[45],"completion":[46],"detection":[47],"can":[48],"be":[49],"used":[50],"to":[51],"measure":[52],"the":[53,84,87],"delay":[54],"of":[55,67,82,86],"synchronous":[57],"circuit":[58,70],"at":[59,63,71],"fabrication":[60],"time":[61],"or":[62],"run":[64,72],"time,":[65],"asynchronous":[69],"time.":[73],"conclude":[75],"by":[76],"showing,":[77],"large":[80],"set":[81],"benchmarks,":[83],"effectiveness":[85],"proposed":[88],"technique.":[89]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":4},{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":4},{"year":2020,"cited_by_count":4},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":6},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":4},{"year":2015,"cited_by_count":4},{"year":2014,"cited_by_count":4},{"year":2013,"cited_by_count":2},{"year":2012,"cited_by_count":2}],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}