{"id":"https://openalex.org/W2142568182","doi":"https://doi.org/10.1109/iccd.2003.1240955","title":"Multiple transition model and enhanced boundary scan architecture to test interconnects for signal integrity","display_name":"Multiple transition model and enhanced boundary scan architecture to test interconnects for signal integrity","publication_year":2004,"publication_date":"2004-05-06","ids":{"openalex":"https://openalex.org/W2142568182","doi":"https://doi.org/10.1109/iccd.2003.1240955","mag":"2142568182"},"language":"en","primary_location":{"id":"doi:10.1109/iccd.2003.1240955","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccd.2003.1240955","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings 21st International Conference on Computer Design","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5082612149","display_name":"M.H. Tehranipour","orcid":null},"institutions":[{"id":"https://openalex.org/I162577319","display_name":"The University of Texas at Dallas","ror":"https://ror.org/049emcs32","country_code":"US","type":"education","lineage":["https://openalex.org/I162577319"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"M.H. Tehranipour","raw_affiliation_strings":["Center for Integrated Circuits & Systems, University of Texas, Dallas, Richardson, TX, USA","Center for Integrated Circuits & Syst., Texas Univ., Dallas, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Center for Integrated Circuits & Systems, University of Texas, Dallas, Richardson, TX, USA","institution_ids":["https://openalex.org/I162577319"]},{"raw_affiliation_string":"Center for Integrated Circuits & Syst., Texas Univ., Dallas, TX, USA","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5064790997","display_name":"Nisar Ahmed","orcid":"https://orcid.org/0000-0002-6397-4860"},"institutions":[{"id":"https://openalex.org/I162577319","display_name":"The University of Texas at Dallas","ror":"https://ror.org/049emcs32","country_code":"US","type":"education","lineage":["https://openalex.org/I162577319"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"N. Ahmed","raw_affiliation_strings":["Center for Integrated Circuits & Systems, University of Texas, Dallas, Richardson, TX, USA","Center for Integrated Circuits & Syst., Texas Univ., Dallas, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Center for Integrated Circuits & Systems, University of Texas, Dallas, Richardson, TX, USA","institution_ids":["https://openalex.org/I162577319"]},{"raw_affiliation_string":"Center for Integrated Circuits & Syst., Texas Univ., Dallas, TX, USA","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5040401289","display_name":"Mehrdad Nourani","orcid":"https://orcid.org/0000-0001-5077-4424"},"institutions":[{"id":"https://openalex.org/I162577319","display_name":"The University of Texas at Dallas","ror":"https://ror.org/049emcs32","country_code":"US","type":"education","lineage":["https://openalex.org/I162577319"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"M. Nourani","raw_affiliation_strings":["Center for Integrated Circuits & Systems, University of Texas, Dallas, Richardson, TX, USA","Center for Integrated Circuits & Syst., Texas Univ., Dallas, TX, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Center for Integrated Circuits & Systems, University of Texas, Dallas, Richardson, TX, USA","institution_ids":["https://openalex.org/I162577319"]},{"raw_affiliation_string":"Center for Integrated Circuits & Syst., Texas Univ., Dallas, TX, USA","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I162577319"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":27,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"554","last_page":"559"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9975000023841858,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/boundary-scan","display_name":"Boundary scan","score":0.8019729256629944},{"id":"https://openalex.org/keywords/signal-integrity","display_name":"Signal integrity","score":0.790023684501648},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5782330632209778},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.554659366607666},{"id":"https://openalex.org/keywords/fault","display_name":"Fault (geology)","score":0.5406602621078491},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.526826798915863},{"id":"https://openalex.org/keywords/signal","display_name":"SIGNAL (programming language)","score":0.513846218585968},{"id":"https://openalex.org/keywords/distortion","display_name":"Distortion (music)","score":0.44920432567596436},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4023565649986267},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.32047978043556213},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.31555283069610596},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.28598731756210327},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.1203790009021759},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.07506227493286133}],"concepts":[{"id":"https://openalex.org/C992767","wikidata":"https://www.wikidata.org/wiki/Q895156","display_name":"Boundary scan","level":3,"score":0.8019729256629944},{"id":"https://openalex.org/C44938667","wikidata":"https://www.wikidata.org/wiki/Q4503810","display_name":"Signal integrity","level":3,"score":0.790023684501648},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5782330632209778},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.554659366607666},{"id":"https://openalex.org/C175551986","wikidata":"https://www.wikidata.org/wiki/Q47089","display_name":"Fault (geology)","level":2,"score":0.5406602621078491},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.526826798915863},{"id":"https://openalex.org/C2779843651","wikidata":"https://www.wikidata.org/wiki/Q7390335","display_name":"SIGNAL (programming language)","level":2,"score":0.513846218585968},{"id":"https://openalex.org/C126780896","wikidata":"https://www.wikidata.org/wiki/Q899871","display_name":"Distortion (music)","level":4,"score":0.44920432567596436},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4023565649986267},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.32047978043556213},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.31555283069610596},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.28598731756210327},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.1203790009021759},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.07506227493286133},{"id":"https://openalex.org/C165205528","wikidata":"https://www.wikidata.org/wiki/Q83371","display_name":"Seismology","level":1,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C127313418","wikidata":"https://www.wikidata.org/wiki/Q1069","display_name":"Geology","level":0,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iccd.2003.1240955","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccd.2003.1240955","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings 21st International Conference on Computer Design","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":23,"referenced_works":["https://openalex.org/W1931735787","https://openalex.org/W1998210153","https://openalex.org/W2028504835","https://openalex.org/W2032266940","https://openalex.org/W2077018692","https://openalex.org/W2097811636","https://openalex.org/W2098706146","https://openalex.org/W2099238640","https://openalex.org/W2100783269","https://openalex.org/W2106168849","https://openalex.org/W2120094593","https://openalex.org/W2132409587","https://openalex.org/W2132747598","https://openalex.org/W2133040214","https://openalex.org/W2138011667","https://openalex.org/W2140391578","https://openalex.org/W2148932348","https://openalex.org/W2150153665","https://openalex.org/W2154811899","https://openalex.org/W2166053532","https://openalex.org/W4242674290","https://openalex.org/W4248261085","https://openalex.org/W6675620916"],"related_works":["https://openalex.org/W2379280877","https://openalex.org/W2001654810","https://openalex.org/W2538042735","https://openalex.org/W1484535011","https://openalex.org/W4248261085","https://openalex.org/W2099238640","https://openalex.org/W1520075683","https://openalex.org/W2148932348","https://openalex.org/W2036853370","https://openalex.org/W2142568182"],"abstract_inverted_index":{"As":[0],"the":[1,9,18,67,87,92,101],"technology":[2],"is":[3,12,28,112],"shrinking":[4],"toward":[5],"50":[6],"nm":[7],"and":[8,24,57,85,104],"working":[10],"frequency":[11],"going":[13],"into":[14],"multi":[15],"gigahertz":[16],"range,":[17],"effect":[19],"of":[20,26,36],"interconnects":[21,41],"on":[22,39],"functionality":[23],"performance":[25],"system-on-chips":[27],"becoming":[29],"dominant.":[30],"More":[31],"specifically,":[32],"distortion":[33],"(integrity":[34],"loss)":[35],"signals":[37],"traveling":[38],"high-speed":[40],"can":[42,105],"no":[43],"longer":[44],"be":[45,106],"ignored.":[46],"Here,":[47],"we":[48],"propose":[49],"a":[50],"new":[51],"fault":[52],"model,":[53],"called":[54],"multiple":[55],"transition,":[56],"its":[58],"corresponding":[59],"test":[60],"pattern":[61],"generation":[62],"mechanism.":[63],"We":[64],"also":[65],"extend":[66],"conventional":[68],"boundary":[69],"scan":[70],"architecture":[71,83,97],"to":[72],"allow":[73],"testing":[74],"signal":[75],"integrity":[76,88],"in":[77],"SoC":[78,110],"interconnects.":[79],"Our":[80],"extended":[81],"JTAG":[82,102],"collects":[84],"outputs":[86],"loss":[89],"information":[90],"using":[91],"enhanced":[93],"observation":[94],"cells.":[95],"The":[96],"fully":[98],"complies":[99],"with":[100],"standard":[103],"adopted":[107],"by":[108],"any":[109],"that":[111],"IEEE":[113],"1149.1":[114],"compliant.":[115]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":2},{"year":2013,"cited_by_count":4},{"year":2012,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}