{"id":"https://openalex.org/W2167793094","doi":"https://doi.org/10.1109/iccd.2002.1106807","title":"Exact closed form formula for partial mutual inductances of on-chip interconnects","display_name":"Exact closed form formula for partial mutual inductances of on-chip interconnects","publication_year":2003,"publication_date":"2003-06-25","ids":{"openalex":"https://openalex.org/W2167793094","doi":"https://doi.org/10.1109/iccd.2002.1106807","mag":"2167793094"},"language":"en","primary_location":{"id":"doi:10.1109/iccd.2002.1106807","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccd.2002.1106807","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. IEEE International Conference on Computer Design: VLSI in Computers and Processors","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5076937226","display_name":"Guoan Zhong","orcid":null},"institutions":[{"id":"https://openalex.org/I219193219","display_name":"Purdue University West Lafayette","ror":"https://ror.org/02dqehb95","country_code":"US","type":"education","lineage":["https://openalex.org/I219193219"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"G. Zhong","raw_affiliation_strings":["School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA","institution_ids":["https://openalex.org/I219193219"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5110204557","display_name":"Cheng\u2010Kok Koh","orcid":null},"institutions":[{"id":"https://openalex.org/I219193219","display_name":"Purdue University West Lafayette","ror":"https://ror.org/02dqehb95","country_code":"US","type":"education","lineage":["https://openalex.org/I219193219"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"C.-K. Koh","raw_affiliation_strings":["School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, USA","institution_ids":["https://openalex.org/I219193219"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5076937226"],"corresponding_institution_ids":["https://openalex.org/I219193219"],"apc_list":null,"apc_paid":null,"fwci":2.0863,"has_fulltext":false,"cited_by_count":28,"citation_normalized_percentile":{"value":0.8784926,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"428","last_page":"433"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11444","display_name":"Electromagnetic Compatibility and Noise Suppression","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11444","display_name":"Electromagnetic Compatibility and Noise Suppression","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/inductance","display_name":"Inductance","score":0.9416030049324036},{"id":"https://openalex.org/keywords/planar","display_name":"Planar","score":0.695325493812561},{"id":"https://openalex.org/keywords/electrical-conductor","display_name":"Electrical conductor","score":0.685791015625},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.46662580966949463},{"id":"https://openalex.org/keywords/closed-form-expression","display_name":"Closed-form expression","score":0.46282726526260376},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.37835681438446045},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3571746051311493},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.3352199196815491},{"id":"https://openalex.org/keywords/mathematical-analysis","display_name":"Mathematical analysis","score":0.29003697633743286},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.2892189919948578},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.12399426102638245},{"id":"https://openalex.org/keywords/combinatorics","display_name":"Combinatorics","score":0.0883449912071228},{"id":"https://openalex.org/keywords/quantum-mechanics","display_name":"Quantum mechanics","score":0.07678785920143127}],"concepts":[{"id":"https://openalex.org/C29210110","wikidata":"https://www.wikidata.org/wiki/Q177897","display_name":"Inductance","level":3,"score":0.9416030049324036},{"id":"https://openalex.org/C134786449","wikidata":"https://www.wikidata.org/wiki/Q3391255","display_name":"Planar","level":2,"score":0.695325493812561},{"id":"https://openalex.org/C202374169","wikidata":"https://www.wikidata.org/wiki/Q124291","display_name":"Electrical conductor","level":2,"score":0.685791015625},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.46662580966949463},{"id":"https://openalex.org/C4530962","wikidata":"https://www.wikidata.org/wiki/Q777407","display_name":"Closed-form expression","level":2,"score":0.46282726526260376},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.37835681438446045},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3571746051311493},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.3352199196815491},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.29003697633743286},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.2892189919948578},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.12399426102638245},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0883449912071228},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.07678785920143127},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.0},{"id":"https://openalex.org/C121684516","wikidata":"https://www.wikidata.org/wiki/Q7600677","display_name":"Computer graphics (images)","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iccd.2002.1106807","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccd.2002.1106807","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. IEEE International Conference on Computer Design: VLSI in Computers and Processors","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1977924393","https://openalex.org/W1989105867","https://openalex.org/W2071990439","https://openalex.org/W2075891646","https://openalex.org/W2103168863","https://openalex.org/W2119302817","https://openalex.org/W2157763958","https://openalex.org/W2162744857","https://openalex.org/W6677815402"],"related_works":["https://openalex.org/W2371304091","https://openalex.org/W2155698516","https://openalex.org/W2146610797","https://openalex.org/W2109314689","https://openalex.org/W2116165382","https://openalex.org/W2383978654","https://openalex.org/W2129157145","https://openalex.org/W2594360463","https://openalex.org/W2111290787","https://openalex.org/W2152025795"],"abstract_inverted_index":{"In":[0],"this":[1],"paper":[2],"we":[3],"propose":[4],"a":[5,27],"new":[6],"exact":[7],"closed":[8],"form":[9],"mutual":[10,19],"inductance":[11,20],"equation":[12],"for":[13,77],"on-chip":[14],"interconnects.":[15,81],"We":[16,32],"express":[17],"the":[18,39,42],"between":[21],"two":[22,43],"parallel":[23,44,79],"rectangular":[24,45],"conductors":[25],"as":[26],"weighted":[28],"sum":[29],"of":[30,41],"self-inductances.":[31],"do":[33],"not":[34],"place":[35],"any":[36],"restrictions":[37],"on":[38,54],"alignment":[40],"conductors.":[46],"Moreover":[47],"they":[48],"could":[49],"be":[50],"co-planar":[51],"or":[52],"reside":[53],"different":[55],"layers.":[56],"Most":[57],"important,":[58],"experimental":[59],"results":[60],"show":[61],"that":[62,70],"our":[63],"formula":[64],"is":[65],"numerically":[66],"more":[67],"stable":[68],"than":[69],"derived":[71],"by":[72],"Hoer":[73],"and":[74],"Love":[75],"(1965)":[76],"long":[78],"onchip":[80]},"counts_by_year":[{"year":2021,"cited_by_count":2},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2012,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
