{"id":"https://openalex.org/W2170552821","doi":"https://doi.org/10.1109/iccd.2002.1106742","title":"A CAD tool for system-on-chip placement and routing with free-space optical interconnect","display_name":"A CAD tool for system-on-chip placement and routing with free-space optical interconnect","publication_year":2003,"publication_date":"2003-06-26","ids":{"openalex":"https://openalex.org/W2170552821","doi":"https://doi.org/10.1109/iccd.2002.1106742","mag":"2170552821"},"language":"en","primary_location":{"id":"doi:10.1109/iccd.2002.1106742","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccd.2002.1106742","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. IEEE International Conference on Computer Design: VLSI in Computers and Processors","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5037202967","display_name":"Sang\u2010Woo Seo","orcid":"https://orcid.org/0000-0002-5744-1216"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Chung-Seok Seo","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5069579193","display_name":"Abhijit Chatterjee","orcid":"https://orcid.org/0000-0003-1553-4470"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"A. Chatterjee","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA","institution_ids":["https://openalex.org/I130701444"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5037202967"],"corresponding_institution_ids":["https://openalex.org/I130701444"],"apc_list":null,"apc_paid":null,"fwci":2.434,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":{"value":0.89519459,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":"1390","issue":null,"first_page":"24","last_page":"29"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11429","display_name":"Semiconductor Lasers and Optical Devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11429","display_name":"Semiconductor Lasers and Optical Devices","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10299","display_name":"Photonic and Optical Devices","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12452","display_name":"Electrowetting and Microfluidic Technologies","score":0.9914000034332275,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.8313609957695007},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.7801177501678467},{"id":"https://openalex.org/keywords/optical-interconnect","display_name":"Optical interconnect","score":0.652238130569458},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.53005450963974},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5153119564056396},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.501516580581665},{"id":"https://openalex.org/keywords/free-space","display_name":"Free space","score":0.4830961227416992},{"id":"https://openalex.org/keywords/cad","display_name":"CAD","score":0.48084506392478943},{"id":"https://openalex.org/keywords/optical-switch","display_name":"Optical switch","score":0.43288755416870117},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.42084455490112305},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3846419155597687},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.29550981521606445},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.14102014899253845},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.08108976483345032},{"id":"https://openalex.org/keywords/optics","display_name":"Optics","score":0.06935051083564758},{"id":"https://openalex.org/keywords/engineering-drawing","display_name":"Engineering drawing","score":0.06775787472724915}],"concepts":[{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.8313609957695007},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.7801177501678467},{"id":"https://openalex.org/C2777759342","wikidata":"https://www.wikidata.org/wiki/Q7098860","display_name":"Optical interconnect","level":3,"score":0.652238130569458},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.53005450963974},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5153119564056396},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.501516580581665},{"id":"https://openalex.org/C2988672794","wikidata":"https://www.wikidata.org/wiki/Q11475","display_name":"Free space","level":2,"score":0.4830961227416992},{"id":"https://openalex.org/C194789388","wikidata":"https://www.wikidata.org/wiki/Q17855283","display_name":"CAD","level":2,"score":0.48084506392478943},{"id":"https://openalex.org/C101336846","wikidata":"https://www.wikidata.org/wiki/Q17105111","display_name":"Optical switch","level":2,"score":0.43288755416870117},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.42084455490112305},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3846419155597687},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.29550981521606445},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.14102014899253845},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.08108976483345032},{"id":"https://openalex.org/C120665830","wikidata":"https://www.wikidata.org/wiki/Q14620","display_name":"Optics","level":1,"score":0.06935051083564758},{"id":"https://openalex.org/C199639397","wikidata":"https://www.wikidata.org/wiki/Q1788588","display_name":"Engineering drawing","level":1,"score":0.06775787472724915},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iccd.2002.1106742","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccd.2002.1106742","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"Proceedings. IEEE International Conference on Computer Design: VLSI in Computers and Processors","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.4699999988079071,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1639032689","https://openalex.org/W1972917167","https://openalex.org/W1987786682","https://openalex.org/W2012290300","https://openalex.org/W2015793783","https://openalex.org/W2028322204","https://openalex.org/W2090857238","https://openalex.org/W2105409701","https://openalex.org/W3023540311","https://openalex.org/W4300809515","https://openalex.org/W6636850861","https://openalex.org/W6647386927","https://openalex.org/W6653511139"],"related_works":["https://openalex.org/W2351102903","https://openalex.org/W2349738060","https://openalex.org/W1989581220","https://openalex.org/W2489653725","https://openalex.org/W2542341225","https://openalex.org/W2036278365","https://openalex.org/W2026286467","https://openalex.org/W2101189193","https://openalex.org/W2376960824","https://openalex.org/W2084994809"],"abstract_inverted_index":{"A":[0],"wiring":[1],"model":[2],"for":[3,21],"system-on-chips":[4,27],"utilizing":[5],"flexible":[6],"free":[7],"space":[8],"optical":[9,31,57,79],"interconnects":[10],"is":[11,73],"introduced":[12],"In":[13],"this":[14],"paper,":[15],"we":[16],"develop":[17],"a":[18,84],"CAD":[19],"tool":[20,35],"physical":[22],"placement":[23],"of":[24,39,55,70,78,86],"modules":[25],"in":[26,67],"manufactured":[28],"using":[29],"the":[30,40,52,56,76],"interconnect":[32,41,58,80],"technology.":[33],"The":[34],"also":[36],"determines":[37],"which":[38,46],"are":[42,47],"routed":[43,48],"electrically":[44],"and":[45],"optically":[49],"without":[50],"exceeding":[51],"routing":[53],"capacity":[54],"while":[59],"minimizing":[60],"electrical":[61,71],"wire":[62],"length.":[63],"About":[64],"50%":[65],"reduction":[66],"largest":[68],"delay":[69],"wires":[72],"obtained":[74],"through":[75],"use":[77],"(Performance":[81],"improvement":[82],"by":[83],"factor":[85],"2).":[87]},"counts_by_year":[{"year":2016,"cited_by_count":2},{"year":2015,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}