{"id":"https://openalex.org/W4404029953","doi":"https://doi.org/10.1109/icccnt61001.2024.10725916","title":"An Area-Efficient VLSI Architecture with Ladner-Fischer PPA for High-Speed Pseudo-Random Bit Generation","display_name":"An Area-Efficient VLSI Architecture with Ladner-Fischer PPA for High-Speed Pseudo-Random Bit Generation","publication_year":2024,"publication_date":"2024-06-24","ids":{"openalex":"https://openalex.org/W4404029953","doi":"https://doi.org/10.1109/icccnt61001.2024.10725916"},"language":"en","primary_location":{"id":"doi:10.1109/icccnt61001.2024.10725916","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icccnt61001.2024.10725916","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 15th International Conference on Computing Communication and Networking Technologies (ICCCNT)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5108617509","display_name":"S. Saranya","orcid":null},"institutions":[{"id":"https://openalex.org/I81556334","display_name":"Amrita Vishwa Vidyapeetham","ror":"https://ror.org/03am10p12","country_code":"IN","type":"education","lineage":["https://openalex.org/I81556334"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Sakkthi Saranya","raw_affiliation_strings":["Amrita Vishwa Vidyapeetham,Amrita School of Engineering,Department of ECE,Chennai,India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Amrita Vishwa Vidyapeetham,Amrita School of Engineering,Department of ECE,Chennai,India","institution_ids":["https://openalex.org/I81556334"]}]},{"author_position":"middle","author":{"id":null,"display_name":"P. Maran","orcid":null},"institutions":[{"id":"https://openalex.org/I81556334","display_name":"Amrita Vishwa Vidyapeetham","ror":"https://ror.org/03am10p12","country_code":"IN","type":"education","lineage":["https://openalex.org/I81556334"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"P. Maran","raw_affiliation_strings":["Amrita Vishwa Vidyapeetham,Amrita School of Engineering,Department of ECE,Chennai,India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Amrita Vishwa Vidyapeetham,Amrita School of Engineering,Department of ECE,Chennai,India","institution_ids":["https://openalex.org/I81556334"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5086064050","display_name":"Sita Devi Bharatula","orcid":null},"institutions":[{"id":"https://openalex.org/I81556334","display_name":"Amrita Vishwa Vidyapeetham","ror":"https://ror.org/03am10p12","country_code":"IN","type":"education","lineage":["https://openalex.org/I81556334"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Sita Devi Bharatula","raw_affiliation_strings":["Amrita Vishwa Vidyapeetham,Amrita School of Engineering,Department of ECE,Chennai,India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Amrita Vishwa Vidyapeetham,Amrita School of Engineering,Department of ECE,Chennai,India","institution_ids":["https://openalex.org/I81556334"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5051118545","display_name":"B. Naresh Kumar Reddy","orcid":"https://orcid.org/0000-0001-8434-3673"},"institutions":[{"id":"https://openalex.org/I122964287","display_name":"National Institute of Technology Tiruchirappalli","ror":"https://ror.org/047x65e68","country_code":"IN","type":"education","lineage":["https://openalex.org/I122964287"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"B. Naresh Kumar Reddy","raw_affiliation_strings":["NIT Tiruchirappalli,Department of ECE,Tiruchirappalli,India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"NIT Tiruchirappalli,Department of ECE,Tiruchirappalli,India","institution_ids":["https://openalex.org/I122964287"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.24451838,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9907000064849854,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9907000064849854,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.989799976348877,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11321","display_name":"Error Correcting Code Techniques","score":0.9890999794006348,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.6768792271614075},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6386462450027466},{"id":"https://openalex.org/keywords/bit","display_name":"Bit (key)","score":0.4932398200035095},{"id":"https://openalex.org/keywords/architecture","display_name":"Architecture","score":0.452706515789032},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4445447623729706},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.34880736470222473},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.23474657535552979},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.1521000862121582}],"concepts":[{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.6768792271614075},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6386462450027466},{"id":"https://openalex.org/C117011727","wikidata":"https://www.wikidata.org/wiki/Q1278488","display_name":"Bit (key)","level":2,"score":0.4932398200035095},{"id":"https://openalex.org/C123657996","wikidata":"https://www.wikidata.org/wiki/Q12271","display_name":"Architecture","level":2,"score":0.452706515789032},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4445447623729706},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.34880736470222473},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.23474657535552979},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.1521000862121582},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icccnt61001.2024.10725916","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icccnt61001.2024.10725916","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 15th International Conference on Computing Communication and Networking Technologies (ICCCNT)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5699999928474426,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W2586653522","https://openalex.org/W2766561181","https://openalex.org/W2901295393","https://openalex.org/W2968111791","https://openalex.org/W2969551671","https://openalex.org/W2972193649","https://openalex.org/W2996409367","https://openalex.org/W3081287854","https://openalex.org/W3092625945","https://openalex.org/W4307727135","https://openalex.org/W4321062422","https://openalex.org/W4381429478","https://openalex.org/W4391543667","https://openalex.org/W4396506950","https://openalex.org/W6631122486"],"related_works":["https://openalex.org/W2411923897","https://openalex.org/W4394546135","https://openalex.org/W4285347720","https://openalex.org/W4200259850","https://openalex.org/W2333831899","https://openalex.org/W2484894494","https://openalex.org/W2134640991","https://openalex.org/W3027318491","https://openalex.org/W2038503502","https://openalex.org/W101478184"],"abstract_inverted_index":{"Pseudorandom":[0],"Bit":[1],"Generation":[2],"(PRBG)":[3],"plays":[4],"a":[5,84],"crucial":[6],"role":[7],"in":[8],"ensuring":[9],"the":[10,30,33,43,61,68,77,113],"security":[11],"of":[12,25,32,45,79,116],"cryptographic":[13,34],"systems":[14,27,47],"by":[15,48],"generating":[16],"random":[17],"bit":[18,104],"sequences":[19],"using":[20,88],"deterministic":[21],"algorithms.":[22],"The":[23],"effectiveness":[24],"these":[26],"hinges":[28],"on":[29,41],"unpredictability":[31],"keys":[35],"they":[36],"generate.":[37],"This":[38],"study":[39],"focuses":[40],"optimizing":[42],"efficiency":[44,115],"PRBG":[46,80,117],"addressing":[49],"key":[50],"factors":[51],"such":[52],"as":[53],"speed,":[54],"area":[55],"utilization,":[56],"and":[57,102],"power":[58],"consumption.":[59],"Leveraging":[60],"parallel":[62],"prefix":[63],"adder":[64],"(PPA)":[65],"architecture,":[66],"particularly":[67],"Laden-Fisher":[69],"design,":[70],"our":[71],"proposed":[72],"method":[73],"aims":[74],"to":[75],"enhance":[76],"performance":[78],"implementations.":[81],"We":[82],"present":[83],"Verilog-based":[85],"design":[86],"implemented":[87],"Vivado":[89],"2023.1":[90],"targeting":[91],"an":[92],"Artix-7":[93],"FPGA":[94,109],"platform.":[95],"Through":[96],"this":[97],"approach,":[98],"we":[99],"achieve":[100],"rapid":[101],"reliable":[103],"generation":[105],"while":[106],"effectively":[107],"managing":[108],"resources,":[110],"ultimately":[111],"enhancing":[112],"overall":[114],"systems.":[118]},"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}