{"id":"https://openalex.org/W3213982619","doi":"https://doi.org/10.1109/icccnt51525.2021.9579762","title":"Design and Implementation of Combined Approach of Zero Finding Logic and Operand Decomposition in Systolic Filter","display_name":"Design and Implementation of Combined Approach of Zero Finding Logic and Operand Decomposition in Systolic Filter","publication_year":2021,"publication_date":"2021-07-06","ids":{"openalex":"https://openalex.org/W3213982619","doi":"https://doi.org/10.1109/icccnt51525.2021.9579762","mag":"3213982619"},"language":"en","primary_location":{"id":"doi:10.1109/icccnt51525.2021.9579762","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icccnt51525.2021.9579762","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 12th International Conference on Computing Communication and Networking Technologies (ICCCNT)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5112633247","display_name":"S. Gomathi","orcid":null},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"S. Gomathi","raw_affiliation_strings":["Kongu Engineering College, Erode"],"affiliations":[{"raw_affiliation_string":"Kongu Engineering College, Erode","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100726493","display_name":"S. Sasikala","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"S. Sasikala","raw_affiliation_strings":["Kongu Engineering College, Erode"],"affiliations":[{"raw_affiliation_string":"Kongu Engineering College, Erode","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5030927970","display_name":"G. Murugesan","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"G. Murugesan","raw_affiliation_strings":["Kongu Engineering College, Erode"],"affiliations":[{"raw_affiliation_string":"Kongu Engineering College, Erode","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5089092797","display_name":"T Maishalini","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"T Maishalini","raw_affiliation_strings":["Kongu Engineering College, Erode"],"affiliations":[{"raw_affiliation_string":"Kongu Engineering College, Erode","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5019628956","display_name":"V Kaviya","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"V Kaviya","raw_affiliation_strings":["Kongu Engineering College, Erode"],"affiliations":[{"raw_affiliation_string":"Kongu Engineering College, Erode","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5042214574","display_name":"R JeevanSanjay","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"R JeevanSanjay","raw_affiliation_strings":["Kongu Engineering College, Erode"],"affiliations":[{"raw_affiliation_string":"Kongu Engineering College, Erode","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5112633247"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.26231455,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"12","issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11021","display_name":"ECG Monitoring and Analysis","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/2705","display_name":"Cardiology and Cardiovascular Medicine"},"field":{"id":"https://openalex.org/fields/27","display_name":"Medicine"},"domain":{"id":"https://openalex.org/domains/4","display_name":"Health Sciences"}},"topics":[{"id":"https://openalex.org/T11021","display_name":"ECG Monitoring and Analysis","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/2705","display_name":"Cardiology and Cardiovascular Medicine"},"field":{"id":"https://openalex.org/fields/27","display_name":"Medicine"},"domain":{"id":"https://openalex.org/domains/4","display_name":"Health Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9955000281333923,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10429","display_name":"EEG and Brain-Computer Interfaces","score":0.9926000237464905,"subfield":{"id":"https://openalex.org/subfields/2805","display_name":"Cognitive Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/modelsim","display_name":"ModelSim","score":0.8493717908859253},{"id":"https://openalex.org/keywords/systolic-array","display_name":"Systolic array","score":0.7413557767868042},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.7128084301948547},{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.7097962498664856},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6203011274337769},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6116291284561157},{"id":"https://openalex.org/keywords/filter","display_name":"Filter (signal processing)","score":0.5282235145568848},{"id":"https://openalex.org/keywords/operand","display_name":"Operand","score":0.4917145073413849},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.4639083743095398},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3980487883090973},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.38182535767555237},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.3689948320388794},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.33803486824035645},{"id":"https://openalex.org/keywords/vhdl","display_name":"VHDL","score":0.290209025144577},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.27545204758644104},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.1881655752658844},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.11732977628707886}],"concepts":[{"id":"https://openalex.org/C2778571676","wikidata":"https://www.wikidata.org/wiki/Q3317826","display_name":"ModelSim","level":4,"score":0.8493717908859253},{"id":"https://openalex.org/C150741067","wikidata":"https://www.wikidata.org/wiki/Q2377218","display_name":"Systolic array","level":3,"score":0.7413557767868042},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.7128084301948547},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.7097962498664856},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6203011274337769},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6116291284561157},{"id":"https://openalex.org/C106131492","wikidata":"https://www.wikidata.org/wiki/Q3072260","display_name":"Filter (signal processing)","level":2,"score":0.5282235145568848},{"id":"https://openalex.org/C55526617","wikidata":"https://www.wikidata.org/wiki/Q719375","display_name":"Operand","level":2,"score":0.4917145073413849},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.4639083743095398},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3980487883090973},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.38182535767555237},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.3689948320388794},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.33803486824035645},{"id":"https://openalex.org/C36941000","wikidata":"https://www.wikidata.org/wiki/Q209455","display_name":"VHDL","level":3,"score":0.290209025144577},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.27545204758644104},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.1881655752658844},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.11732977628707886},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.0},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icccnt51525.2021.9579762","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icccnt51525.2021.9579762","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 12th International Conference on Computing Communication and Networking Technologies (ICCCNT)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.5099999904632568,"id":"https://metadata.un.org/sdg/3","display_name":"Good health and well-being"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1521556593","https://openalex.org/W1993871385","https://openalex.org/W2010177317","https://openalex.org/W2035779447","https://openalex.org/W2051963223","https://openalex.org/W2077957601","https://openalex.org/W2143867117","https://openalex.org/W2182474820","https://openalex.org/W2414288268","https://openalex.org/W2461252613","https://openalex.org/W2515214453","https://openalex.org/W3024364770"],"related_works":["https://openalex.org/W2967107136","https://openalex.org/W2072220574","https://openalex.org/W4285082868","https://openalex.org/W3119693822","https://openalex.org/W2188712114","https://openalex.org/W2572056115","https://openalex.org/W2617265001","https://openalex.org/W2015155483","https://openalex.org/W2558076308","https://openalex.org/W2162004439"],"abstract_inverted_index":{"Cardiovascular":[0],"disease":[1],"is":[2,38,129],"the":[3,31,39,69,88,120,144,167,191],"major":[4],"threat":[5],"to":[6,16,21,91,111],"human":[7],"life":[8],"for":[9,119,157,176],"decades":[10],"and":[11,83,98,106,114,137,150,183],"deaths":[12],"do":[13],"occur":[14],"due":[15],"delayed":[17,115],"treatment.":[18],"In":[19,74],"order":[20],"prevent":[22],"this":[23],"disease,":[24],"ECG":[25,43],"analysis":[26],"should":[27],"be":[28,56,92],"done":[29,57],"at":[30],"earliest.":[32],"Detection":[33],"of":[34,46,96,122,172,186],"QRS":[35,123],"complex":[36],"detection":[37,48,124],"predominant":[40],"step":[41],"in":[42,68,71,103,135,141,152],"analysis.":[44,158],"Implementation":[45],"such":[47],"algorithms":[49],"requires":[50],"dedicated":[51],"hardware.":[52],"Hardware":[53],"realizations":[54],"can":[55],"using":[58,148],"VLSI":[59,61,77],"technology.":[60],"technology":[62],"had":[63],"played":[64],"a":[65,76],"decisive":[66],"role":[67],"field":[70],"signal":[72],"processing.":[73],"designing":[75],"system":[78],"high":[79],"speed,":[80],"low":[81,84],"area":[82,105,113,184],"power":[85],"consumption":[86],"are":[87],"fundamental":[89],"metrics":[90],"considered.":[93],"Generally":[94],"design":[95,112,128],"adders":[97,136],"multipliers":[99],"will":[100],"have":[101],"constraints":[102],"delay,":[104],"speed.":[107],"This":[108],"paper":[109],"addresses":[110],"reduced":[116],"systolic":[117],"filter":[118,181],"application":[121],"algorithm.":[125],"Systolic":[126,180],"Filter":[127],"built":[130],"by":[131],"Zero":[132],"finding":[133],"logic":[134],"operand":[138],"decomposition":[139],"method":[140],"multipliers.":[142],"All":[143],"circuits":[145],"were":[146],"designed":[147],"Modelsim":[149],"implemented":[151],"Xilinx":[153],"Spartan":[154],"3S":[155],"family":[156],"The":[159],"implementation":[160],"result":[161],"shows":[162],"that":[163],"proposed":[164],"architecture":[165],"provides":[166],"combinational":[168],"path":[169],"delay":[170],"reduction":[171,185],"15%,":[173],"31%,":[174],"20%":[175,187],"4-tap,":[177],"8-tap,":[178],"16-tap":[179],"structure":[182],"when":[188],"compared":[189],"with":[190],"existing":[192],"filters.":[193]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
