{"id":"https://openalex.org/W3093486124","doi":"https://doi.org/10.1109/icccnt49239.2020.9225501","title":"Design of a Two-Bit Magnitude Comparator Based on Pass Transistor, Transmission Gate and Conventional Static CMOS Logic","display_name":"Design of a Two-Bit Magnitude Comparator Based on Pass Transistor, Transmission Gate and Conventional Static CMOS Logic","publication_year":2020,"publication_date":"2020-07-01","ids":{"openalex":"https://openalex.org/W3093486124","doi":"https://doi.org/10.1109/icccnt49239.2020.9225501","mag":"3093486124"},"language":"en","primary_location":{"id":"doi:10.1109/icccnt49239.2020.9225501","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icccnt49239.2020.9225501","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 11th International Conference on Computing, Communication and Networking Technologies (ICCCNT)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5079904980","display_name":"Samiha Lubaba","orcid":null},"institutions":[{"id":"https://openalex.org/I157386601","display_name":"North South University","ror":"https://ror.org/05wdbfp45","country_code":"BD","type":"education","lineage":["https://openalex.org/I157386601"]}],"countries":["BD"],"is_corresponding":true,"raw_author_name":"Samiha Lubaba","raw_affiliation_strings":["North South University,Department of Electrical and Computer Engineering,Dhaka,Bangladesh","North South University, Dhaka, Bangladesh"],"affiliations":[{"raw_affiliation_string":"North South University,Department of Electrical and Computer Engineering,Dhaka,Bangladesh","institution_ids":["https://openalex.org/I157386601"]},{"raw_affiliation_string":"North South University, Dhaka, Bangladesh","institution_ids":["https://openalex.org/I157386601"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5007640854","display_name":"K. M. Faisal","orcid":"https://orcid.org/0000-0002-6101-7004"},"institutions":[{"id":"https://openalex.org/I157386601","display_name":"North South University","ror":"https://ror.org/05wdbfp45","country_code":"BD","type":"education","lineage":["https://openalex.org/I157386601"]}],"countries":["BD"],"is_corresponding":false,"raw_author_name":"K. M. Faisal","raw_affiliation_strings":["North South University,Department of Electrical and Computer Engineering,Dhaka,Bangladesh","North South University, Dhaka, Bangladesh"],"affiliations":[{"raw_affiliation_string":"North South University,Department of Electrical and Computer Engineering,Dhaka,Bangladesh","institution_ids":["https://openalex.org/I157386601"]},{"raw_affiliation_string":"North South University, Dhaka, Bangladesh","institution_ids":["https://openalex.org/I157386601"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5055591599","display_name":"Moumita Sadia Islam","orcid":null},"institutions":[{"id":"https://openalex.org/I157386601","display_name":"North South University","ror":"https://ror.org/05wdbfp45","country_code":"BD","type":"education","lineage":["https://openalex.org/I157386601"]}],"countries":["BD"],"is_corresponding":false,"raw_author_name":"Moumita Sadia Islam","raw_affiliation_strings":["North South University,Department of Electrical and Computer Engineering,Dhaka,Bangladesh","North South University, Dhaka, Bangladesh"],"affiliations":[{"raw_affiliation_string":"North South University,Department of Electrical and Computer Engineering,Dhaka,Bangladesh","institution_ids":["https://openalex.org/I157386601"]},{"raw_affiliation_string":"North South University, Dhaka, Bangladesh","institution_ids":["https://openalex.org/I157386601"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100754616","display_name":"Mehedi Hasan","orcid":"https://orcid.org/0000-0002-5767-6728"},"institutions":[{"id":"https://openalex.org/I91090688","display_name":"University of Science and Technology Chittagong","ror":"https://ror.org/00w9tx359","country_code":"BD","type":"education","lineage":["https://openalex.org/I91090688"]},{"id":"https://openalex.org/I102782458","display_name":"Chittagong University of Engineering & Technology","ror":"https://ror.org/052qsay17","country_code":"BD","type":"education","lineage":["https://openalex.org/I102782458"]},{"id":"https://openalex.org/I894293524","display_name":"University of Chittagong","ror":"https://ror.org/01173vs27","country_code":"BD","type":"education","lineage":["https://openalex.org/I894293524"]}],"countries":["BD"],"is_corresponding":false,"raw_author_name":"Mehedi Hasan","raw_affiliation_strings":["Jack-Kilby VLSI Lab, University of Science and Technology, Chittagong,Chattogram,Bangladesh","Jack-Kilby VLSI Lab, University of Science and Technology, Chittagong, Chattogram, Bangladesh"],"affiliations":[{"raw_affiliation_string":"Jack-Kilby VLSI Lab, University of Science and Technology, Chittagong,Chattogram,Bangladesh","institution_ids":["https://openalex.org/I102782458","https://openalex.org/I894293524"]},{"raw_affiliation_string":"Jack-Kilby VLSI Lab, University of Science and Technology, Chittagong, Chattogram, Bangladesh","institution_ids":["https://openalex.org/I91090688"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5079904980"],"corresponding_institution_ids":["https://openalex.org/I157386601"],"apc_list":null,"apc_paid":null,"fwci":2.06,"has_fulltext":false,"cited_by_count":31,"citation_normalized_percentile":{"value":0.86500496,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":96,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/comparator","display_name":"Comparator","score":0.732576847076416},{"id":"https://openalex.org/keywords/pass-transistor-logic","display_name":"Pass transistor logic","score":0.7084724307060242},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6871762275695801},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6365301012992859},{"id":"https://openalex.org/keywords/transmission-gate","display_name":"Transmission gate","score":0.6262810826301575},{"id":"https://openalex.org/keywords/logic-family","display_name":"Logic family","score":0.6047946810722351},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.599270761013031},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.5487946271896362},{"id":"https://openalex.org/keywords/resistor\u2013transistor-logic","display_name":"Resistor\u2013transistor logic","score":0.48445892333984375},{"id":"https://openalex.org/keywords/integrated-injection-logic","display_name":"Integrated injection logic","score":0.47027450799942017},{"id":"https://openalex.org/keywords/power\u2013delay-product","display_name":"Power\u2013delay product","score":0.4676092863082886},{"id":"https://openalex.org/keywords/and-or-invert","display_name":"AND-OR-Invert","score":0.4581768214702606},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.4507581293582916},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4351264238357544},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.39599359035491943},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.34423762559890747},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3228939175605774},{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.27327316999435425},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2586636245250702},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.07659643888473511}],"concepts":[{"id":"https://openalex.org/C155745195","wikidata":"https://www.wikidata.org/wiki/Q1164179","display_name":"Comparator","level":3,"score":0.732576847076416},{"id":"https://openalex.org/C198521697","wikidata":"https://www.wikidata.org/wiki/Q7142438","display_name":"Pass transistor logic","level":4,"score":0.7084724307060242},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6871762275695801},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6365301012992859},{"id":"https://openalex.org/C2780949067","wikidata":"https://www.wikidata.org/wiki/Q1136752","display_name":"Transmission gate","level":4,"score":0.6262810826301575},{"id":"https://openalex.org/C162454741","wikidata":"https://www.wikidata.org/wiki/Q173359","display_name":"Logic family","level":4,"score":0.6047946810722351},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.599270761013031},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.5487946271896362},{"id":"https://openalex.org/C180405849","wikidata":"https://www.wikidata.org/wiki/Q173464","display_name":"Resistor\u2013transistor logic","level":5,"score":0.48445892333984375},{"id":"https://openalex.org/C159903706","wikidata":"https://www.wikidata.org/wiki/Q173574","display_name":"Integrated injection logic","level":5,"score":0.47027450799942017},{"id":"https://openalex.org/C2776391166","wikidata":"https://www.wikidata.org/wiki/Q7236873","display_name":"Power\u2013delay product","level":4,"score":0.4676092863082886},{"id":"https://openalex.org/C130126468","wikidata":"https://www.wikidata.org/wiki/Q4652943","display_name":"AND-OR-Invert","level":5,"score":0.4581768214702606},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.4507581293582916},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4351264238357544},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.39599359035491943},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.34423762559890747},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3228939175605774},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.27327316999435425},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2586636245250702},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.07659643888473511}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icccnt49239.2020.9225501","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icccnt49239.2020.9225501","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2020 11th International Conference on Computing, Communication and Networking Technologies (ICCCNT)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8500000238418579}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":42,"referenced_works":["https://openalex.org/W98859305","https://openalex.org/W593092793","https://openalex.org/W1518236483","https://openalex.org/W1972913619","https://openalex.org/W1988098241","https://openalex.org/W2046103068","https://openalex.org/W2057772501","https://openalex.org/W2071116779","https://openalex.org/W2073828402","https://openalex.org/W2091396131","https://openalex.org/W2115708774","https://openalex.org/W2119985366","https://openalex.org/W2127696501","https://openalex.org/W2159229333","https://openalex.org/W2160361604","https://openalex.org/W2187874179","https://openalex.org/W2503774716","https://openalex.org/W2535470237","https://openalex.org/W2590700271","https://openalex.org/W2613396321","https://openalex.org/W2624633082","https://openalex.org/W2765454500","https://openalex.org/W2767063453","https://openalex.org/W2775569701","https://openalex.org/W2803057706","https://openalex.org/W2916748707","https://openalex.org/W2945625898","https://openalex.org/W2966167417","https://openalex.org/W2970993020","https://openalex.org/W2971831978","https://openalex.org/W2972696482","https://openalex.org/W2997250644","https://openalex.org/W2997259386","https://openalex.org/W2997923220","https://openalex.org/W2998002330","https://openalex.org/W3034899143","https://openalex.org/W3156408416","https://openalex.org/W3174540764","https://openalex.org/W4242700761","https://openalex.org/W6747156342","https://openalex.org/W6772314871","https://openalex.org/W6794261471"],"related_works":["https://openalex.org/W3166523576","https://openalex.org/W2778421845","https://openalex.org/W3210322980","https://openalex.org/W2565020286","https://openalex.org/W2208321188","https://openalex.org/W2622086348","https://openalex.org/W1987908008","https://openalex.org/W4390345136","https://openalex.org/W2126467087","https://openalex.org/W3093486124"],"abstract_inverted_index":{"Since":[0],"there":[1,32],"is":[2,33,52,166],"a":[3,74],"swift":[4],"technological":[5],"progress":[6],"going":[7],"on":[8],"in":[9,25,42,59,82,133,144],"the":[10,55,116,155,158,164],"recent":[11],"years,":[12],"semiconductor":[13],"industry":[14],"evolved":[15],"to":[16],"such":[17],"an":[18],"extend":[19],"that":[20,177],"requirement":[21,35],"of":[22,36,48,54,64,89,115,125,146,157,163],"optimal":[23],"performance":[24],"electronic":[26],"circuits":[27],"have":[28],"become":[29],"essential.":[30],"Therefore,":[31],"high":[34],"energy":[37],"efficient":[38],"fast":[39],"circuit":[40],"designs":[41],"modern":[43],"Integrated":[44],"Circuits":[45],"(IC).":[46],"Comparison":[47],"two":[49],"binary":[50],"digits":[51],"one":[53],"fundamental":[56],"arithmetic":[57],"operations":[58],"Arithmetic":[60],"Logic":[61,98,103,110],"Units":[62],"(ALU)":[63],"ICs":[65],"and":[66,105,148],"processors.":[67],"A":[68],"hybrid":[69,86],"design":[70,87,118,140,165],"approach":[71],"for":[72,174],"implementing":[73],"two-bit":[75,127],"Magnitude":[76],"Comparator":[77],"(MC)":[78],"has":[79,119],"been":[80,120],"proposed":[81,117,139],"this":[83],"work.":[84],"The":[85,113,138],"consists":[88],"three":[90],"different":[91],"logic":[92],"techniques":[93],"namely:":[94],"(a)":[95],"Pass":[96],"Transistor":[97],"(PTL),":[99],"(b)":[100],"Transmission":[101],"Gate":[102],"(TGL)":[104],"(c)":[106],"Conventional":[107],"Static":[108],"CMOS":[109],"(C-CMOS":[111],"logic).":[112],"effectiveness":[114,156],"compared":[121],"with":[122],"6":[123],"state":[124],"art":[126],"magnitude":[128],"comparators":[129],"using":[130],"Cadence":[131],"tools":[132],"90":[134],"nm":[135],"technology":[136],"node.":[137],"showed":[141],"best":[142],"perormacne":[143],"case":[145],"delay":[147],"Power":[149],"Delay":[150],"Product":[151],"(PDP)":[152],"which":[153,169],"proved":[154],"design,":[159],"Moreover,":[160],"power":[161],"consumption":[162],"also":[167],"low":[168],"makes":[170],"it":[171],"highly":[172],"usable":[173],"portable":[175],"devices":[176],"requires":[178],"low-power":[179],"consumption.":[180]},"counts_by_year":[{"year":2025,"cited_by_count":4},{"year":2024,"cited_by_count":3},{"year":2023,"cited_by_count":9},{"year":2022,"cited_by_count":6},{"year":2021,"cited_by_count":6},{"year":2020,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}