{"id":"https://openalex.org/W2899010227","doi":"https://doi.org/10.1109/icccnt.2018.8494059","title":"LVCMOS Based 4-Bit Register","display_name":"LVCMOS Based 4-Bit Register","publication_year":2018,"publication_date":"2018-07-01","ids":{"openalex":"https://openalex.org/W2899010227","doi":"https://doi.org/10.1109/icccnt.2018.8494059","mag":"2899010227"},"language":"en","primary_location":{"id":"doi:10.1109/icccnt.2018.8494059","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icccnt.2018.8494059","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 9th International Conference on Computing, Communication and Networking Technologies (ICCCNT)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5064109651","display_name":"Tarun Agrawal","orcid":"https://orcid.org/0000-0003-2117-8601"},"institutions":[{"id":"https://openalex.org/I82571370","display_name":"GLA University","ror":"https://ror.org/05fnxgv12","country_code":"IN","type":"education","lineage":["https://openalex.org/I82571370"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Tarun Agrawal","raw_affiliation_strings":["Department of Electronics and communication, GLA University, Mathura, India"],"affiliations":[{"raw_affiliation_string":"Department of Electronics and communication, GLA University, Mathura, India","institution_ids":["https://openalex.org/I82571370"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5075302324","display_name":"Anjan Kumar","orcid":"https://orcid.org/0000-0002-0451-6042"},"institutions":[{"id":"https://openalex.org/I82571370","display_name":"GLA University","ror":"https://ror.org/05fnxgv12","country_code":"IN","type":"education","lineage":["https://openalex.org/I82571370"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Anjan Kumar","raw_affiliation_strings":["Department of Electronics and communication, GLA University, Mathura, India"],"affiliations":[{"raw_affiliation_string":"Department of Electronics and communication, GLA University, Mathura, India","institution_ids":["https://openalex.org/I82571370"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Priyanka","orcid":null},"institutions":[{"id":"https://openalex.org/I82571370","display_name":"GLA University","ror":"https://ror.org/05fnxgv12","country_code":"IN","type":"education","lineage":["https://openalex.org/I82571370"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Priyanka","raw_affiliation_strings":["Department of Electronics and communication, GLA University, Mathura, India"],"affiliations":[{"raw_affiliation_string":"Department of Electronics and communication, GLA University, Mathura, India","institution_ids":["https://openalex.org/I82571370"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103269540","display_name":"Pooja Aggarwal","orcid":null},"institutions":[{"id":"https://openalex.org/I82571370","display_name":"GLA University","ror":"https://ror.org/05fnxgv12","country_code":"IN","type":"education","lineage":["https://openalex.org/I82571370"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Pooja Aggarwal","raw_affiliation_strings":["Department of Electronics and communication, GLA University, Mathura, India"],"affiliations":[{"raw_affiliation_string":"Department of Electronics and communication, GLA University, Mathura, India","institution_ids":["https://openalex.org/I82571370"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5082622377","display_name":"Syed Saad Tirmizi","orcid":null},"institutions":[{"id":"https://openalex.org/I82571370","display_name":"GLA University","ror":"https://ror.org/05fnxgv12","country_code":"IN","type":"education","lineage":["https://openalex.org/I82571370"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Syed Saad Tirmizi","raw_affiliation_strings":["Department of Electronics and communication, GLA University, Mathura, India"],"affiliations":[{"raw_affiliation_string":"Department of Electronics and communication, GLA University, Mathura, India","institution_ids":["https://openalex.org/I82571370"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5064109651"],"corresponding_institution_ids":["https://openalex.org/I82571370"],"apc_list":null,"apc_paid":null,"fwci":0.3343,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.58744858,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"3"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9976000189781189,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10382","display_name":"Quantum and electron transport phenomena","score":0.995199978351593,"subfield":{"id":"https://openalex.org/subfields/3107","display_name":"Atomic and Molecular Physics, and Optics"},"field":{"id":"https://openalex.org/fields/31","display_name":"Physics and Astronomy"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6919230222702026},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.646801233291626},{"id":"https://openalex.org/keywords/register","display_name":"Register (sociolinguistics)","score":0.5294247269630432},{"id":"https://openalex.org/keywords/verilog","display_name":"Verilog","score":0.5249578952789307},{"id":"https://openalex.org/keywords/suite","display_name":"Suite","score":0.5161886811256409},{"id":"https://openalex.org/keywords/bit","display_name":"Bit (key)","score":0.4817235767841339},{"id":"https://openalex.org/keywords/dissipation","display_name":"Dissipation","score":0.46868661046028137},{"id":"https://openalex.org/keywords/4-bit","display_name":"4-bit","score":0.45490914583206177},{"id":"https://openalex.org/keywords/register-file","display_name":"Register file","score":0.4547507166862488},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.45121055841445923},{"id":"https://openalex.org/keywords/scaling","display_name":"Scaling","score":0.4278010129928589},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.41785991191864014},{"id":"https://openalex.org/keywords/32-bit","display_name":"32-bit","score":0.41401752829551697},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.40953993797302246},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.40016046166419983},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3456937074661255},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.33791881799697876},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.26599088311195374},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.22958123683929443},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.19061806797981262},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.09627896547317505}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6919230222702026},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.646801233291626},{"id":"https://openalex.org/C2779235478","wikidata":"https://www.wikidata.org/wiki/Q286576","display_name":"Register (sociolinguistics)","level":2,"score":0.5294247269630432},{"id":"https://openalex.org/C2779030575","wikidata":"https://www.wikidata.org/wiki/Q827773","display_name":"Verilog","level":3,"score":0.5249578952789307},{"id":"https://openalex.org/C79581498","wikidata":"https://www.wikidata.org/wiki/Q1367530","display_name":"Suite","level":2,"score":0.5161886811256409},{"id":"https://openalex.org/C117011727","wikidata":"https://www.wikidata.org/wiki/Q1278488","display_name":"Bit (key)","level":2,"score":0.4817235767841339},{"id":"https://openalex.org/C135402231","wikidata":"https://www.wikidata.org/wiki/Q898440","display_name":"Dissipation","level":2,"score":0.46868661046028137},{"id":"https://openalex.org/C194986542","wikidata":"https://www.wikidata.org/wiki/Q229932","display_name":"4-bit","level":3,"score":0.45490914583206177},{"id":"https://openalex.org/C117280010","wikidata":"https://www.wikidata.org/wiki/Q180944","display_name":"Register file","level":3,"score":0.4547507166862488},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.45121055841445923},{"id":"https://openalex.org/C99844830","wikidata":"https://www.wikidata.org/wiki/Q102441924","display_name":"Scaling","level":2,"score":0.4278010129928589},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.41785991191864014},{"id":"https://openalex.org/C75695347","wikidata":"https://www.wikidata.org/wiki/Q225147","display_name":"32-bit","level":2,"score":0.41401752829551697},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.40953993797302246},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.40016046166419983},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3456937074661255},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.33791881799697876},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.26599088311195374},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.22958123683929443},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.19061806797981262},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.09627896547317505},{"id":"https://openalex.org/C95457728","wikidata":"https://www.wikidata.org/wiki/Q309","display_name":"History","level":0,"score":0.0},{"id":"https://openalex.org/C97355855","wikidata":"https://www.wikidata.org/wiki/Q11473","display_name":"Thermodynamics","level":1,"score":0.0},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.0},{"id":"https://openalex.org/C138885662","wikidata":"https://www.wikidata.org/wiki/Q5891","display_name":"Philosophy","level":0,"score":0.0},{"id":"https://openalex.org/C41895202","wikidata":"https://www.wikidata.org/wiki/Q8162","display_name":"Linguistics","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C166957645","wikidata":"https://www.wikidata.org/wiki/Q23498","display_name":"Archaeology","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/icccnt.2018.8494059","is_oa":false,"landing_page_url":"https://doi.org/10.1109/icccnt.2018.8494059","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 9th International Conference on Computing, Communication and Networking Technologies (ICCCNT)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.7799999713897705,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1579110463","https://openalex.org/W2114801263","https://openalex.org/W2147691936","https://openalex.org/W2489547092","https://openalex.org/W2508880948","https://openalex.org/W2529830312","https://openalex.org/W2546431935","https://openalex.org/W2597051037","https://openalex.org/W2772299060","https://openalex.org/W6728879265"],"related_works":["https://openalex.org/W2028353274","https://openalex.org/W975020229","https://openalex.org/W1902169700","https://openalex.org/W2944782356","https://openalex.org/W2460493569","https://openalex.org/W2144193790","https://openalex.org/W4211092986","https://openalex.org/W4254551318","https://openalex.org/W3149091528","https://openalex.org/W2585161597"],"abstract_inverted_index":{"In":[0],"this":[1],"paper,":[2],"a":[3],"4":[4,21,81],"bit":[5,22],"register":[6,23],"is":[7,18,25,42,66],"designed":[8,24],"using":[9],"Xilinx":[10],"ISE":[11],"design":[12],"suite":[13],"14.2.":[14],"The":[15,20,37,64],"language":[16],"used":[17,40,73],"Verilog.":[19],"FPGA":[26],"based":[27],"and":[28,50,70,83],"will":[29,53],"be":[30],"dissipating":[31],"the":[32,58,71],"minimum":[33,61],"amount":[34],"of":[35,60],"power.":[36],"I/O":[38],"standard":[39],"here":[41],"LVCMOS":[43],"(Low":[44],"Voltage":[45],"Complementary":[46],"Metal":[47],"Oxide":[48],"Semiconductor)":[49],"mobile_ddr":[51],"which":[52],"help":[54],"us":[55],"in":[56],"achieving":[57],"goal":[59],"power":[62],"dissipation.":[63],"scaling":[65],"done":[67],"on":[68],"frequency":[69],"frequencies":[72],"are":[74],"1":[75],"Ghz,":[76,78,80],"2":[77],"3":[79],"Ghz":[82],"5":[84],"GHz.":[85]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":1},{"year":2019,"cited_by_count":2}],"updated_date":"2026-04-16T08:26:57.006410","created_date":"2025-10-10T00:00:00"}