{"id":"https://openalex.org/W4416429734","doi":"https://doi.org/10.1109/iccad66269.2025.11240990","title":"RSizing: Robust Bayesian Optimization for Analog Circuit Sizing Under Process Variations","display_name":"RSizing: Robust Bayesian Optimization for Analog Circuit Sizing Under Process Variations","publication_year":2025,"publication_date":"2025-10-26","ids":{"openalex":"https://openalex.org/W4416429734","doi":"https://doi.org/10.1109/iccad66269.2025.11240990"},"language":null,"primary_location":{"id":"doi:10.1109/iccad66269.2025.11240990","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccad66269.2025.11240990","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE/ACM International Conference On Computer Aided Design (ICCAD)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5117163395","display_name":"Jindong Tu","orcid":null},"institutions":[{"id":"https://openalex.org/I4210116924","display_name":"Chinese University of Hong Kong, Shenzhen","ror":"https://ror.org/02d5ks197","country_code":"CN","type":"education","lineage":["https://openalex.org/I177725633","https://openalex.org/I180726961","https://openalex.org/I4210116924"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jindong Tu","raw_affiliation_strings":["The Chinese University of Hong Kong,Shenzhen"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"The Chinese University of Hong Kong,Shenzhen","institution_ids":["https://openalex.org/I4210116924"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5108995618","display_name":"Yapeng Li","orcid":null},"institutions":[{"id":"https://openalex.org/I4210116924","display_name":"Chinese University of Hong Kong, Shenzhen","ror":"https://ror.org/02d5ks197","country_code":"CN","type":"education","lineage":["https://openalex.org/I177725633","https://openalex.org/I180726961","https://openalex.org/I4210116924"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yapeng Li","raw_affiliation_strings":["The Chinese University of Hong Kong,Shenzhen"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"The Chinese University of Hong Kong,Shenzhen","institution_ids":["https://openalex.org/I4210116924"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112430367","display_name":"Peng Xu","orcid":"https://orcid.org/0009-0009-5669-8106"},"institutions":[{"id":"https://openalex.org/I177725633","display_name":"Chinese University of Hong Kong","ror":"https://ror.org/00t33hh48","country_code":"HK","type":"education","lineage":["https://openalex.org/I177725633"]}],"countries":["HK"],"is_corresponding":false,"raw_author_name":"Peng Xu","raw_affiliation_strings":["The Chinese University of Hong Kong"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"The Chinese University of Hong Kong","institution_ids":["https://openalex.org/I177725633"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100721492","display_name":"Tuo Li","orcid":"https://orcid.org/0000-0002-6691-7423"},"institutions":[{"id":"https://openalex.org/I4210144487","display_name":"Cloud Computing Center","ror":"https://ror.org/04aa0zm65","country_code":"CN","type":"facility","lineage":["https://openalex.org/I4210144487"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Tuo Li","raw_affiliation_strings":["Shandong Yunhai Guochuang Cloud Computing Equipment Industry Innovation Co., Lt"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Shandong Yunhai Guochuang Cloud Computing Equipment Industry Innovation Co., Lt","institution_ids":["https://openalex.org/I4210144487"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100368584","display_name":"Guoqing Li","orcid":"https://orcid.org/0000-0003-2075-8583"},"institutions":[{"id":"https://openalex.org/I4210144487","display_name":"Cloud Computing Center","ror":"https://ror.org/04aa0zm65","country_code":"CN","type":"facility","lineage":["https://openalex.org/I4210144487"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Guoqing Li","raw_affiliation_strings":["Shandong Yunhai Guochuang Cloud Computing Equipment Industry Innovation Co., Lt"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Shandong Yunhai Guochuang Cloud Computing Equipment Industry Innovation Co., Lt","institution_ids":["https://openalex.org/I4210144487"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078679823","display_name":"Zushuai Xie","orcid":"https://orcid.org/0000-0002-9711-1107"},"institutions":[{"id":"https://openalex.org/I41198531","display_name":"Nanjing University of Posts and Telecommunications","ror":"https://ror.org/043bpky34","country_code":"CN","type":"education","lineage":["https://openalex.org/I41198531"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zushuai Xie","raw_affiliation_strings":["Nanjing University of Posts and Telecommunications"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Nanjing University of Posts and Telecommunications","institution_ids":["https://openalex.org/I41198531"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5051340429","display_name":"Bei Yu","orcid":"https://orcid.org/0000-0001-6406-4810"},"institutions":[{"id":"https://openalex.org/I177725633","display_name":"Chinese University of Hong Kong","ror":"https://ror.org/00t33hh48","country_code":"HK","type":"education","lineage":["https://openalex.org/I177725633"]}],"countries":["HK"],"is_corresponding":false,"raw_author_name":"Bei Yu","raw_affiliation_strings":["The Chinese University of Hong Kong"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"The Chinese University of Hong Kong","institution_ids":["https://openalex.org/I177725633"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5022945347","display_name":"Tinghuan Chen","orcid":"https://orcid.org/0000-0002-9195-6619"},"institutions":[{"id":"https://openalex.org/I4210116924","display_name":"Chinese University of Hong Kong, Shenzhen","ror":"https://ror.org/02d5ks197","country_code":"CN","type":"education","lineage":["https://openalex.org/I177725633","https://openalex.org/I180726961","https://openalex.org/I4210116924"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Tinghuan Chen","raw_affiliation_strings":["The Chinese University of Hong Kong,Shenzhen"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"The Chinese University of Hong Kong,Shenzhen","institution_ids":["https://openalex.org/I4210116924"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"8"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.6019999980926514,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.6019999980926514,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.14830000698566437,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10848","display_name":"Advanced Multi-Objective Optimization Algorithms","score":0.03550000116229057,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/robustness","display_name":"Robustness (evolution)","score":0.6198999881744385},{"id":"https://openalex.org/keywords/monte-carlo-method","display_name":"Monte Carlo method","score":0.5694000124931335},{"id":"https://openalex.org/keywords/bayesian-optimization","display_name":"Bayesian optimization","score":0.4903999865055084},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.4747999906539917},{"id":"https://openalex.org/keywords/sizing","display_name":"Sizing","score":0.4449999928474426},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.4189000129699707},{"id":"https://openalex.org/keywords/netlist","display_name":"Netlist","score":0.39430001378059387},{"id":"https://openalex.org/keywords/gaussian-process","display_name":"Gaussian process","score":0.39079999923706055},{"id":"https://openalex.org/keywords/electronic-design-automation","display_name":"Electronic design automation","score":0.38260000944137573},{"id":"https://openalex.org/keywords/circuit-design","display_name":"Circuit design","score":0.3767000138759613}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6245999932289124},{"id":"https://openalex.org/C63479239","wikidata":"https://www.wikidata.org/wiki/Q7353546","display_name":"Robustness (evolution)","level":3,"score":0.6198999881744385},{"id":"https://openalex.org/C19499675","wikidata":"https://www.wikidata.org/wiki/Q232207","display_name":"Monte Carlo method","level":2,"score":0.5694000124931335},{"id":"https://openalex.org/C2778049539","wikidata":"https://www.wikidata.org/wiki/Q17002908","display_name":"Bayesian optimization","level":2,"score":0.4903999865055084},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.4747999906539917},{"id":"https://openalex.org/C2777767291","wikidata":"https://www.wikidata.org/wiki/Q1080291","display_name":"Sizing","level":2,"score":0.4449999928474426},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.4189000129699707},{"id":"https://openalex.org/C177650935","wikidata":"https://www.wikidata.org/wiki/Q1760303","display_name":"Netlist","level":2,"score":0.39430001378059387},{"id":"https://openalex.org/C61326573","wikidata":"https://www.wikidata.org/wiki/Q1496376","display_name":"Gaussian process","level":3,"score":0.39079999923706055},{"id":"https://openalex.org/C64260653","wikidata":"https://www.wikidata.org/wiki/Q1194864","display_name":"Electronic design automation","level":2,"score":0.38260000944137573},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.3767000138759613},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.366100013256073},{"id":"https://openalex.org/C34559072","wikidata":"https://www.wikidata.org/wiki/Q2334061","display_name":"Design of experiments","level":2,"score":0.3571000099182129},{"id":"https://openalex.org/C2776221188","wikidata":"https://www.wikidata.org/wiki/Q21072556","display_name":"Design space exploration","level":2,"score":0.34150001406669617},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.3382999897003174},{"id":"https://openalex.org/C29074008","wikidata":"https://www.wikidata.org/wiki/Q174925","display_name":"Analogue electronics","level":3,"score":0.33469998836517334},{"id":"https://openalex.org/C52740198","wikidata":"https://www.wikidata.org/wiki/Q1539564","display_name":"Importance sampling","level":3,"score":0.3337000012397766},{"id":"https://openalex.org/C49937458","wikidata":"https://www.wikidata.org/wiki/Q2599292","display_name":"Probabilistic logic","level":2,"score":0.32600000500679016},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.3240000009536743},{"id":"https://openalex.org/C93389723","wikidata":"https://www.wikidata.org/wiki/Q7247313","display_name":"Process variation","level":3,"score":0.320499986410141},{"id":"https://openalex.org/C55396564","wikidata":"https://www.wikidata.org/wiki/Q3084971","display_name":"Process design","level":3,"score":0.31119999289512634},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3111000061035156},{"id":"https://openalex.org/C186394612","wikidata":"https://www.wikidata.org/wiki/Q7098942","display_name":"Optimal design","level":2,"score":0.2996000051498413},{"id":"https://openalex.org/C140779682","wikidata":"https://www.wikidata.org/wiki/Q210868","display_name":"Sampling (signal processing)","level":3,"score":0.29429998993873596},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.28870001435279846},{"id":"https://openalex.org/C48262172","wikidata":"https://www.wikidata.org/wiki/Q16908765","display_name":"Design process","level":3,"score":0.2883000075817108},{"id":"https://openalex.org/C34972735","wikidata":"https://www.wikidata.org/wiki/Q2920267","display_name":"Engineering design process","level":2,"score":0.28760001063346863},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.2824000120162964},{"id":"https://openalex.org/C115901376","wikidata":"https://www.wikidata.org/wiki/Q184199","display_name":"Automation","level":2,"score":0.275299996137619},{"id":"https://openalex.org/C107673813","wikidata":"https://www.wikidata.org/wiki/Q812534","display_name":"Bayesian probability","level":2,"score":0.26420000195503235},{"id":"https://openalex.org/C160234255","wikidata":"https://www.wikidata.org/wiki/Q812535","display_name":"Bayesian inference","level":3,"score":0.2603999972343445},{"id":"https://openalex.org/C126255220","wikidata":"https://www.wikidata.org/wiki/Q141495","display_name":"Mathematical optimization","level":1,"score":0.2517000138759613},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.25130000710487366}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iccad66269.2025.11240990","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccad66269.2025.11240990","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE/ACM International Conference On Computer Aided Design (ICCAD)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"},{"id":"https://openalex.org/F4320337504","display_name":"Research and Development","ror":"https://ror.org/027s68j25"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":25,"referenced_works":["https://openalex.org/W1971212388","https://openalex.org/W2067964949","https://openalex.org/W2126105956","https://openalex.org/W2126639080","https://openalex.org/W2149764047","https://openalex.org/W2192203593","https://openalex.org/W2768460200","https://openalex.org/W2782226720","https://openalex.org/W2809500545","https://openalex.org/W2963805801","https://openalex.org/W3121642476","https://openalex.org/W3134296451","https://openalex.org/W3203408580","https://openalex.org/W3205090792","https://openalex.org/W4211049957","https://openalex.org/W4236195134","https://openalex.org/W4248670092","https://openalex.org/W4293025085","https://openalex.org/W4297990030","https://openalex.org/W4312591505","https://openalex.org/W4386765237","https://openalex.org/W4389158755","https://openalex.org/W4389162407","https://openalex.org/W4401070628","https://openalex.org/W4404134159"],"related_works":[],"abstract_inverted_index":{"The":[0,95],"increasing":[1],"complexity":[2],"of":[3,88,113],"CMOS":[4],"technology":[5],"and":[6,132],"circuit":[7,34,79],"designs":[8,115],"has":[9],"intensified":[10],"the":[11,63,85,92,111,124],"need":[12],"for":[13,32],"robust":[14,114],"analog":[15,33],"design":[16,55,64,93],"automation":[17],"tools":[18],"that":[19,36,142],"can":[20],"handle":[21],"process":[22,43,82],"variations":[23],"effectively.":[24],"This":[25],"paper":[26],"presents":[27],"RSizing,":[28],"a":[29,48],"novel":[30],"approach":[31],"sizing":[35],"optimizes":[37],"performance":[38,80,146,158],"while":[39,155],"ensuring":[40],"robustness":[41],"against":[42],"variations.":[44],"Our":[45],"method":[46],"employs":[47],"three-phase":[49],"strategy:":[50],"First,":[51],"it":[52,68,122],"identifies":[53],"promising":[54],"regions":[56],"through":[57,126],"nominal":[58],"condition":[59],"optimization":[60,71],"to":[61,77,109,148],"prune":[62],"space":[65],"efficiently.":[66],"Second,":[67],"performs":[69],"variation-aware":[70],"using":[72,116],"heteroscedastic":[73],"Gaussian":[74],"processes":[75],"(HGP)":[76],"model":[78,133],"under":[81],"variations,":[83],"capturing":[84],"non-uniform":[86],"nature":[87],"process-induced":[89],"fluctuations":[90],"across":[91],"space.":[94],"HGP":[96],"models":[97],"are":[98],"combined":[99],"with":[100,160],"an":[101],"efficient":[102],"acquisition":[103],"function":[104],"based":[105],"on":[106,137],"Thompson":[107],"sampling":[108],"guide":[110],"exploration":[112],"limited":[117],"Monte":[118,129],"Carlo":[119,130],"simulations.":[120],"Finally,":[121],"refines":[123],"solutions":[125],"additional":[127],"targeted":[128],"simulations":[131],"calibration.":[134],"Experimental":[135],"results":[136],"three":[138],"benchmark":[139],"circuits":[140],"demonstrate":[141],"RSizing":[143],"achieves":[144],"superior":[145],"compared":[147],"existing":[149],"methods,":[150],"consistently":[151],"meeting":[152],"yield":[153],"requirements":[154],"optimizing":[156],"multiple":[157],"metrics":[159],"significantly":[161],"reduced":[162],"computational":[163],"cost.":[164]},"counts_by_year":[],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-11-20T00:00:00"}