{"id":"https://openalex.org/W4416429706","doi":"https://doi.org/10.1109/iccad66269.2025.11240975","title":"Energy-Efficient Multi-Operand XOR Logic-Based CIM Accelerator using RRAM technology","display_name":"Energy-Efficient Multi-Operand XOR Logic-Based CIM Accelerator using RRAM technology","publication_year":2025,"publication_date":"2025-10-26","ids":{"openalex":"https://openalex.org/W4416429706","doi":"https://doi.org/10.1109/iccad66269.2025.11240975"},"language":null,"primary_location":{"id":"doi:10.1109/iccad66269.2025.11240975","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccad66269.2025.11240975","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE/ACM International Conference On Computer Aided Design (ICCAD)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5056263300","display_name":"Abhairaj Singh","orcid":"https://orcid.org/0000-0002-2729-7057"},"institutions":[{"id":"https://openalex.org/I98358874","display_name":"Delft University of Technology","ror":"https://ror.org/02e2c7k09","country_code":"NL","type":"education","lineage":["https://openalex.org/I98358874"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Abhairaj Singh","raw_affiliation_strings":["TU Delft,Computer Engineering Laboratory,The Netherlands"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"TU Delft,Computer Engineering Laboratory,The Netherlands","institution_ids":["https://openalex.org/I98358874"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5079308946","display_name":"Konstantinos Stavrakakis","orcid":"https://orcid.org/0009-0004-6355-8690"},"institutions":[{"id":"https://openalex.org/I98358874","display_name":"Delft University of Technology","ror":"https://ror.org/02e2c7k09","country_code":"NL","type":"education","lineage":["https://openalex.org/I98358874"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Konstantinos Stavrakakis","raw_affiliation_strings":["TU Delft,Computer Engineering Laboratory,The Netherlands"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"TU Delft,Computer Engineering Laboratory,The Netherlands","institution_ids":["https://openalex.org/I98358874"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5090692955","display_name":"Rajendra Bishnoi","orcid":"https://orcid.org/0000-0002-0516-7112"},"institutions":[{"id":"https://openalex.org/I98358874","display_name":"Delft University of Technology","ror":"https://ror.org/02e2c7k09","country_code":"NL","type":"education","lineage":["https://openalex.org/I98358874"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Rajendra Bishnoi","raw_affiliation_strings":["TU Delft,Computer Engineering Laboratory,The Netherlands"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"TU Delft,Computer Engineering Laboratory,The Netherlands","institution_ids":["https://openalex.org/I98358874"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5105554115","display_name":"Rajiv Joshi","orcid":"https://orcid.org/0009-0007-7486-1531"},"institutions":[{"id":"https://openalex.org/I98358874","display_name":"Delft University of Technology","ror":"https://ror.org/02e2c7k09","country_code":"NL","type":"education","lineage":["https://openalex.org/I98358874"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Rajiv V. Joshi","raw_affiliation_strings":["TU Delft,Computer Engineering Laboratory,The Netherlands"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"TU Delft,Computer Engineering Laboratory,The Netherlands","institution_ids":["https://openalex.org/I98358874"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5005739146","display_name":"Said Hamdioui","orcid":"https://orcid.org/0000-0002-8961-0387"},"institutions":[{"id":"https://openalex.org/I98358874","display_name":"Delft University of Technology","ror":"https://ror.org/02e2c7k09","country_code":"NL","type":"education","lineage":["https://openalex.org/I98358874"]}],"countries":["NL"],"is_corresponding":false,"raw_author_name":"Said Hamdioui","raw_affiliation_strings":["TU Delft,Computer Engineering Laboratory,The Netherlands"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"TU Delft,Computer Engineering Laboratory,The Netherlands","institution_ids":["https://openalex.org/I98358874"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I98358874"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"7"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9761999845504761,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9761999845504761,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.010700000450015068,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.003100000089034438,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/operand","display_name":"Operand","score":0.8288000226020813},{"id":"https://openalex.org/keywords/xor-gate","display_name":"XOR gate","score":0.656000018119812},{"id":"https://openalex.org/keywords/resistive-random-access-memory","display_name":"Resistive random-access memory","score":0.49480000138282776},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.47440001368522644},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.42260000109672546},{"id":"https://openalex.org/keywords/bitwise-operation","display_name":"Bitwise operation","score":0.4172999858856201},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.41589999198913574},{"id":"https://openalex.org/keywords/resistive-touchscreen","display_name":"Resistive touchscreen","score":0.415800005197525}],"concepts":[{"id":"https://openalex.org/C55526617","wikidata":"https://www.wikidata.org/wiki/Q719375","display_name":"Operand","level":2,"score":0.8288000226020813},{"id":"https://openalex.org/C28495749","wikidata":"https://www.wikidata.org/wiki/Q155516","display_name":"XOR gate","level":3,"score":0.656000018119812},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6046000123023987},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5382999777793884},{"id":"https://openalex.org/C182019814","wikidata":"https://www.wikidata.org/wiki/Q1143830","display_name":"Resistive random-access memory","level":3,"score":0.49480000138282776},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.47440001368522644},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.42260000109672546},{"id":"https://openalex.org/C134765980","wikidata":"https://www.wikidata.org/wiki/Q879126","display_name":"Bitwise operation","level":2,"score":0.4172999858856201},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.41589999198913574},{"id":"https://openalex.org/C6899612","wikidata":"https://www.wikidata.org/wiki/Q852911","display_name":"Resistive touchscreen","level":2,"score":0.415800005197525},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.3898000121116638},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.3783000111579895},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.376800000667572},{"id":"https://openalex.org/C77618280","wikidata":"https://www.wikidata.org/wiki/Q1155772","display_name":"Scheme (mathematics)","level":2,"score":0.37380000948905945},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3686000108718872},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.35260000824928284},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.34869998693466187},{"id":"https://openalex.org/C50942859","wikidata":"https://www.wikidata.org/wiki/Q4967193","display_name":"Rectification","level":3,"score":0.32690000534057617},{"id":"https://openalex.org/C146569638","wikidata":"https://www.wikidata.org/wiki/Q173378","display_name":"Logic level","level":3,"score":0.325300008058548},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.3125999867916107},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.2808000147342682},{"id":"https://openalex.org/C32666082","wikidata":"https://www.wikidata.org/wiki/Q7450979","display_name":"Sense amplifier","level":3,"score":0.2694000005722046},{"id":"https://openalex.org/C105339364","wikidata":"https://www.wikidata.org/wiki/Q2297740","display_name":"Software deployment","level":2,"score":0.2671999931335449},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.26080000400543213},{"id":"https://openalex.org/C29210110","wikidata":"https://www.wikidata.org/wiki/Q177897","display_name":"Inductance","level":3,"score":0.2522999942302704}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iccad66269.2025.11240975","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccad66269.2025.11240975","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE/ACM International Conference On Computer Aided Design (ICCAD)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":22,"referenced_works":["https://openalex.org/W2396622873","https://openalex.org/W2556075366","https://openalex.org/W2588236721","https://openalex.org/W2593172471","https://openalex.org/W2738894409","https://openalex.org/W2787336703","https://openalex.org/W2805362231","https://openalex.org/W2891550056","https://openalex.org/W2912358078","https://openalex.org/W2970608956","https://openalex.org/W3013080934","https://openalex.org/W3047881865","https://openalex.org/W3093475241","https://openalex.org/W3138138784","https://openalex.org/W3208067593","https://openalex.org/W3209739718","https://openalex.org/W4213334477","https://openalex.org/W4213444069","https://openalex.org/W4226080078","https://openalex.org/W4245524998","https://openalex.org/W4280614391","https://openalex.org/W4308575315"],"related_works":[],"abstract_inverted_index":{"Recent":[0],"advances":[1],"in":[2,20,27,72,120],"Resistive":[3],"RAM":[4],"(RRAM)":[5],"based":[6],"Computation-In-Memory":[7],"(CIM)":[8],"architectures":[9],"highlight":[10],"significant":[11],"potential":[12],"for":[13,57,84,144],"accelerating":[14],"data-intensive":[15],"computing":[16],"tasks.":[17],"However,":[18],"non-idealities":[19],"RRAM":[21],"devices,":[22],"such":[23,126],"as":[24,127,166],"variability,":[25],"result":[26],"small":[28],"sensing":[29,86],"margins":[30],"that":[31,93,154],"can":[32,160],"significantly":[33],"affect":[34],"the":[35,98,107,112,121,135,138],"computational":[36],"efficiency.":[37],"This":[38,51,101],"issue":[39],"becomes":[40],"even":[41],"more":[42],"pronounced":[43],"when":[44],"dealing":[45],"with":[46],"complex":[47],"multi-operand":[48,59],"logic":[49,61,109],"operations.":[50],"paper":[52],"introduces":[53],"a":[54,64,73,145,169],"circuit-level":[55],"scheme":[56],"CIM-based":[58],"XOR":[60,158],"operations,":[62],"leveraging":[63],"Voltage-To-Time":[65],"converter":[66],"(VTC)":[67],"to":[68,97,156,168,181],"perform":[69],"multi-phased":[70],"XORs":[71],"single":[74],"clock":[75],"cycle.":[76],"In":[77],"this":[78],"approach,":[79],"we":[80],"exploit":[81],"bitline":[82],"capacitances":[83],"voltage-based":[85],"during":[87,131],"computation,":[88],"generating":[89],"an":[90],"output":[91,110],"voltage":[92,102],"is":[94,103,140],"linearly":[95],"proportional":[96],"operand":[99],"values.":[100],"then":[104],"converted":[105],"into":[106],"desired":[108],"using":[111],"VTC":[113],"design.":[114],"Furthermore,":[115],"low-power":[116],"techniques":[117],"are":[118],"employed":[119],"deployment":[122],"of":[123,171],"sense":[124],"amplifiers,":[125],"regulating":[128],"power":[129],"consumption":[130],"operation":[132,159],"and":[133,163,187],"disabling":[134],"amplifiers":[136],"once":[137],"decision":[139],"made.":[141],"Simulation":[142],"results":[143],"post-layout":[146],"extracted":[147],"512x512":[148],"(256Kb)":[149],"RRAM-based":[150],"CIM":[151],"array":[152],"show":[153],"up":[155,180],"16-operand":[157],"be":[161],"accurately":[162],"reliably":[164],"performed":[165],"opposed":[167],"maximum":[170],"three":[172],"operands":[173],"supported":[174],"by":[175],"state-of-the-art":[176],"solutions,":[177],"while":[178],"offering":[179],"49\u00d7":[182],"better":[183],"figure-of-merit":[184],"combining":[185],"energy-efficiency":[186],"throughput.":[188]},"counts_by_year":[{"year":2026,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-11-20T00:00:00"}