{"id":"https://openalex.org/W7106159046","doi":"https://doi.org/10.1109/iccad66269.2025.11240939","title":"R <sup>2</sup> T-Tiny: Runtime-Reconfigurable Throughput-Optimized TinyML for Hybrid Inference Acceleration on FPGA SoCs","display_name":"R <sup>2</sup> T-Tiny: Runtime-Reconfigurable Throughput-Optimized TinyML for Hybrid Inference Acceleration on FPGA SoCs","publication_year":2025,"publication_date":"2025-10-26","ids":{"openalex":"https://openalex.org/W7106159046","doi":"https://doi.org/10.1109/iccad66269.2025.11240939"},"language":null,"primary_location":{"id":"doi:10.1109/iccad66269.2025.11240939","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccad66269.2025.11240939","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE/ACM International Conference On Computer Aided Design (ICCAD)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":null,"display_name":"Georgios Mentzos","orcid":null},"institutions":[{"id":"https://openalex.org/I102335020","display_name":"Karlsruhe Institute of Technology","ror":"https://ror.org/04t3en479","country_code":"DE","type":"education","lineage":["https://openalex.org/I102335020","https://openalex.org/I1305996414"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Georgios Mentzos","raw_affiliation_strings":["Karlsruhe Institute of Technology,Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Karlsruhe Institute of Technology,Germany","institution_ids":["https://openalex.org/I102335020"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Valentin Alexander Frey","orcid":null},"institutions":[{"id":"https://openalex.org/I102335020","display_name":"Karlsruhe Institute of Technology","ror":"https://ror.org/04t3en479","country_code":"DE","type":"education","lineage":["https://openalex.org/I102335020","https://openalex.org/I1305996414"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Valentin Alexander Frey","raw_affiliation_strings":["Karlsruhe Institute of Technology,Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Karlsruhe Institute of Technology,Germany","institution_ids":["https://openalex.org/I102335020"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Konstantinos Balaskas","orcid":null},"institutions":[{"id":"https://openalex.org/I174878644","display_name":"University of Patras","ror":"https://ror.org/017wvtq80","country_code":"GR","type":"education","lineage":["https://openalex.org/I174878644"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Konstantinos Balaskas","raw_affiliation_strings":["University of Patras,Greece"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Patras,Greece","institution_ids":["https://openalex.org/I174878644"]}]},{"author_position":"middle","author":{"id":null,"display_name":"Georgios Zervakis","orcid":null},"institutions":[{"id":"https://openalex.org/I174878644","display_name":"University of Patras","ror":"https://ror.org/017wvtq80","country_code":"GR","type":"education","lineage":["https://openalex.org/I174878644"]}],"countries":["GR"],"is_corresponding":false,"raw_author_name":"Georgios Zervakis","raw_affiliation_strings":["University of Patras,Greece"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Patras,Greece","institution_ids":["https://openalex.org/I174878644"]}]},{"author_position":"last","author":{"id":null,"display_name":"J\u00f6rg Henkel","orcid":null},"institutions":[{"id":"https://openalex.org/I102335020","display_name":"Karlsruhe Institute of Technology","ror":"https://ror.org/04t3en479","country_code":"DE","type":"education","lineage":["https://openalex.org/I102335020","https://openalex.org/I1305996414"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"J\u00f6rg Henkel","raw_affiliation_strings":["Karlsruhe Institute of Technology,Germany"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Karlsruhe Institute of Technology,Germany","institution_ids":["https://openalex.org/I102335020"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.51577822,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"9"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10036","display_name":"Advanced Neural Network Applications","score":0.6704999804496765,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10036","display_name":"Advanced Neural Network Applications","score":0.6704999804496765,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.05810000002384186,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.05480000004172325,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7886999845504761},{"id":"https://openalex.org/keywords/throughput","display_name":"Throughput","score":0.7549999952316284},{"id":"https://openalex.org/keywords/acceleration","display_name":"Acceleration","score":0.5242000222206116},{"id":"https://openalex.org/keywords/efficient-energy-use","display_name":"Efficient energy use","score":0.49129998683929443},{"id":"https://openalex.org/keywords/microcontroller","display_name":"Microcontroller","score":0.45570001006126404},{"id":"https://openalex.org/keywords/gate-array","display_name":"Gate array","score":0.4510999917984009},{"id":"https://openalex.org/keywords/resource","display_name":"Resource (disambiguation)","score":0.44999998807907104},{"id":"https://openalex.org/keywords/inference","display_name":"Inference","score":0.4496000111103058}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7886999845504761},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7724000215530396},{"id":"https://openalex.org/C157764524","wikidata":"https://www.wikidata.org/wiki/Q1383412","display_name":"Throughput","level":3,"score":0.7549999952316284},{"id":"https://openalex.org/C117896860","wikidata":"https://www.wikidata.org/wiki/Q11376","display_name":"Acceleration","level":2,"score":0.5242000222206116},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5080999732017517},{"id":"https://openalex.org/C2742236","wikidata":"https://www.wikidata.org/wiki/Q924713","display_name":"Efficient energy use","level":2,"score":0.49129998683929443},{"id":"https://openalex.org/C173018170","wikidata":"https://www.wikidata.org/wiki/Q165678","display_name":"Microcontroller","level":2,"score":0.45570001006126404},{"id":"https://openalex.org/C114237110","wikidata":"https://www.wikidata.org/wiki/Q114901","display_name":"Gate array","level":3,"score":0.4510999917984009},{"id":"https://openalex.org/C206345919","wikidata":"https://www.wikidata.org/wiki/Q20380951","display_name":"Resource (disambiguation)","level":2,"score":0.44999998807907104},{"id":"https://openalex.org/C2776214188","wikidata":"https://www.wikidata.org/wiki/Q408386","display_name":"Inference","level":2,"score":0.4496000111103058},{"id":"https://openalex.org/C13164978","wikidata":"https://www.wikidata.org/wiki/Q600158","display_name":"Hardware acceleration","level":3,"score":0.4458000063896179},{"id":"https://openalex.org/C151201525","wikidata":"https://www.wikidata.org/wiki/Q177239","display_name":"Limit (mathematics)","level":2,"score":0.43869999051094055},{"id":"https://openalex.org/C9652623","wikidata":"https://www.wikidata.org/wiki/Q190109","display_name":"Field (mathematics)","level":2,"score":0.4343000054359436},{"id":"https://openalex.org/C50644808","wikidata":"https://www.wikidata.org/wiki/Q192776","display_name":"Artificial neural network","level":2,"score":0.4230000078678131},{"id":"https://openalex.org/C77390884","wikidata":"https://www.wikidata.org/wiki/Q217302","display_name":"Application-specific integrated circuit","level":2,"score":0.37290000915527344},{"id":"https://openalex.org/C186370098","wikidata":"https://www.wikidata.org/wiki/Q442787","display_name":"Energy (signal processing)","level":2,"score":0.36160001158714294},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3327000141143799},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3319999873638153},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.27230000495910645},{"id":"https://openalex.org/C113843644","wikidata":"https://www.wikidata.org/wiki/Q901882","display_name":"Interface (matter)","level":4,"score":0.2721000015735626},{"id":"https://openalex.org/C29202148","wikidata":"https://www.wikidata.org/wiki/Q287260","display_name":"Resource allocation","level":2,"score":0.27149999141693115},{"id":"https://openalex.org/C108583219","wikidata":"https://www.wikidata.org/wiki/Q197536","display_name":"Deep learning","level":2,"score":0.26460000872612},{"id":"https://openalex.org/C150741067","wikidata":"https://www.wikidata.org/wiki/Q2377218","display_name":"Systolic array","level":3,"score":0.25699999928474426},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.2513999938964844}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iccad66269.2025.11240939","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccad66269.2025.11240939","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE/ACM International Conference On Computer Aided Design (ICCAD)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Decent work and economic growth","score":0.42873433232307434,"id":"https://metadata.un.org/sdg/8"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":18,"referenced_works":["https://openalex.org/W2080556528","https://openalex.org/W2513568085","https://openalex.org/W2565125333","https://openalex.org/W2727238169","https://openalex.org/W2796625795","https://openalex.org/W2899915146","https://openalex.org/W3119962849","https://openalex.org/W3174389038","https://openalex.org/W3175548485","https://openalex.org/W3193859704","https://openalex.org/W3215210342","https://openalex.org/W4283806531","https://openalex.org/W4312037452","https://openalex.org/W4377295722","https://openalex.org/W4383751021","https://openalex.org/W4390306248","https://openalex.org/W4391759599","https://openalex.org/W4392828138"],"related_works":[],"abstract_inverted_index":{"The":[0],"emergence":[1],"of":[2,35,41,48,76,169,183,201],"tiny":[3,110,170],"machine":[4],"learning":[5],"(TinyML)":[6],"has":[7],"represented":[8],"a":[9,59,92,97,109,122,218],"paradigm":[10],"shift":[11],"toward":[12],"energy":[13,69],"efficient":[14],"and":[15,25,67,102,120,153],"on-device":[16],"inference,":[17],"with":[18],"TinyML":[19,42,178,212],"research":[20],"primarily":[21],"focusing":[22],"on":[23,176,191],"low-cost":[24],"energy-efficiency":[26],"microcontroller":[27],"units":[28],"(MCUs).":[29],"However,":[30],"the":[31,39,46,117,150,165,181,192,211],"low":[32,68],"computational":[33],"capabilities":[34,182],"MCUs":[36],"greatly":[37],"limit":[38],"performance":[40],"applications,":[43],"especially":[44],"in":[45,186,210],"case":[47],"throughput":[49,161,189,197],"driven":[50],"tasks.":[51],"Field":[52],"programmable":[53],"gate":[54],"arrays":[55],"(FPGAs),":[56],"are":[57],"therefore":[58],"promising":[60],"alternative":[61],"to":[62,164,216],"MCUs,":[63],"offering":[64],"high":[65,160,188],"parallelism":[66],"requirements.":[70],"FPGA-based":[71],"accelerators":[72],"typically":[73],"follow":[74],"one":[75],"two":[77],"directions:":[78],"high-throughput":[79],"resource-intensive":[80],"pipelined":[81],"designs,":[82],"or":[83],"low-throughput":[84],"sequential":[85],"systolic":[86,219],"arrays.":[87],"Incorporating":[88],"both":[89],"approaches":[90],"into":[91,139],"hybrid":[93,124],"streaming/sequential":[94],"accelerator":[95,151,222],"strikes":[96],"balance":[98],"between":[99],"resource":[100,106,167],"efficiency":[101],"throughput,":[103],"but":[104],"incurs":[105],"contention":[107],"within":[108],"FPGA.":[111],"In":[112],"this":[113],"work,":[114],"we":[115],"address":[116],"aforementioned":[118],"limitations":[119],"propose":[121],"throughput-driven":[123,140],"acceleration":[125],"methodology":[126],"for":[127],"TinyML.":[128],"We":[129],"introduce":[130],"R2T-Tiny,":[131],"an":[132,199],"adaptive":[133],"framework":[134,185],"that":[135],"brings":[136],"layer-wise":[137],"customizability":[138],"inference.":[141],"By":[142],"leveraging":[143],"runtime":[144],"partial":[145],"reconfiguration,":[146],"R2T-Tiny":[147],"dynamically":[148],"adjusts":[149],"type":[152],"applies":[154],"tailored":[155],"approximations":[156],"per":[157],"layer,":[158],"achieving":[159,187],"while":[162,225],"adhering":[163],"tight":[166],"constraints":[168],"embedded":[171],"FPGAs.":[172],"Our":[173],"comprehensive":[174],"evaluation":[175],"popular":[177,205],"benchmarks":[179],"showcases":[180],"our":[184],"inference":[190],"PYNQ-Z2":[193],"FPGA":[194],"board,":[195],"increasing":[196],"by":[198],"average":[200],"1.6x":[202],"across":[203],"3":[204],"deep":[206],"neural":[207],"networks":[208],"(DNNs)":[209],"domain,":[213],"when":[214],"compared":[215],"DNNDK,":[217],"array":[220],"based":[221],"from":[223],"Xilinx,":[224],"incurring":[226],"less":[227],"than":[228],"1%":[229],"accuracy":[230],"loss.":[231]},"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-11-20T00:00:00"}
