{"id":"https://openalex.org/W4416429541","doi":"https://doi.org/10.1109/iccad66269.2025.11240818","title":"(Invited Paper) AnaFlow: Agentic LLM-based Workflow for Reasoning-Driven Explainable and Sample-Efficient Analog Circuit Sizing","display_name":"(Invited Paper) AnaFlow: Agentic LLM-based Workflow for Reasoning-Driven Explainable and Sample-Efficient Analog Circuit Sizing","publication_year":2025,"publication_date":"2025-10-26","ids":{"openalex":"https://openalex.org/W4416429541","doi":"https://doi.org/10.1109/iccad66269.2025.11240818"},"language":null,"primary_location":{"id":"doi:10.1109/iccad66269.2025.11240818","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccad66269.2025.11240818","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE/ACM International Conference On Computer Aided Design (ICCAD)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5081690392","display_name":"Mohsen Ahmadzadeh","orcid":"https://orcid.org/0000-0003-1113-092X"},"institutions":[{"id":"https://openalex.org/I99464096","display_name":"KU Leuven","ror":"https://ror.org/05f950310","country_code":"BE","type":"education","lineage":["https://openalex.org/I99464096"]}],"countries":["BE"],"is_corresponding":true,"raw_author_name":"Mohsen Ahmadzadeh","raw_affiliation_strings":["KU Leuven,ESAT-MICAS,Leuven,Belgium,3001"],"affiliations":[{"raw_affiliation_string":"KU Leuven,ESAT-MICAS,Leuven,Belgium,3001","institution_ids":["https://openalex.org/I99464096"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102839044","display_name":"Kaichang Chen","orcid":"https://orcid.org/0000-0002-8437-2594"},"institutions":[{"id":"https://openalex.org/I99464096","display_name":"KU Leuven","ror":"https://ror.org/05f950310","country_code":"BE","type":"education","lineage":["https://openalex.org/I99464096"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"Kaichang Chen","raw_affiliation_strings":["KU Leuven,ESAT-MICAS,Leuven,Belgium,3001"],"affiliations":[{"raw_affiliation_string":"KU Leuven,ESAT-MICAS,Leuven,Belgium,3001","institution_ids":["https://openalex.org/I99464096"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5029270525","display_name":"Georges Gielen","orcid":"https://orcid.org/0000-0002-4061-9428"},"institutions":[{"id":"https://openalex.org/I99464096","display_name":"KU Leuven","ror":"https://ror.org/05f950310","country_code":"BE","type":"education","lineage":["https://openalex.org/I99464096"]}],"countries":["BE"],"is_corresponding":false,"raw_author_name":"Georges Gielen","raw_affiliation_strings":["KU Leuven,ESAT-MICAS,Leuven,Belgium,3001"],"affiliations":[{"raw_affiliation_string":"KU Leuven,ESAT-MICAS,Leuven,Belgium,3001","institution_ids":["https://openalex.org/I99464096"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5081690392"],"corresponding_institution_ids":["https://openalex.org/I99464096"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.36175357,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"7"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.8884000182151794,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.8884000182151794,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.021400000900030136,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11206","display_name":"Model Reduction and Neural Networks","score":0.012900000438094139,"subfield":{"id":"https://openalex.org/subfields/3109","display_name":"Statistical and Nonlinear Physics"},"field":{"id":"https://openalex.org/fields/31","display_name":"Physics and Astronomy"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/reinforcement-learning","display_name":"Reinforcement learning","score":0.6531999707221985},{"id":"https://openalex.org/keywords/interfacing","display_name":"Interfacing","score":0.6499000191688538},{"id":"https://openalex.org/keywords/workflow","display_name":"Workflow","score":0.5687000155448914},{"id":"https://openalex.org/keywords/bottleneck","display_name":"Bottleneck","score":0.513700008392334},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.4657000005245209},{"id":"https://openalex.org/keywords/sizing","display_name":"Sizing","score":0.4645000100135803},{"id":"https://openalex.org/keywords/bayesian-optimization","display_name":"Bayesian optimization","score":0.41600000858306885},{"id":"https://openalex.org/keywords/analogue-electronics","display_name":"Analogue electronics","score":0.39910000562667847}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7365999817848206},{"id":"https://openalex.org/C97541855","wikidata":"https://www.wikidata.org/wiki/Q830687","display_name":"Reinforcement learning","level":2,"score":0.6531999707221985},{"id":"https://openalex.org/C2776303644","wikidata":"https://www.wikidata.org/wiki/Q1020499","display_name":"Interfacing","level":2,"score":0.6499000191688538},{"id":"https://openalex.org/C177212765","wikidata":"https://www.wikidata.org/wiki/Q627335","display_name":"Workflow","level":2,"score":0.5687000155448914},{"id":"https://openalex.org/C2780513914","wikidata":"https://www.wikidata.org/wiki/Q18210350","display_name":"Bottleneck","level":2,"score":0.513700008392334},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.4657000005245209},{"id":"https://openalex.org/C2777767291","wikidata":"https://www.wikidata.org/wiki/Q1080291","display_name":"Sizing","level":2,"score":0.4645000100135803},{"id":"https://openalex.org/C2778049539","wikidata":"https://www.wikidata.org/wiki/Q17002908","display_name":"Bayesian optimization","level":2,"score":0.41600000858306885},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.41130000352859497},{"id":"https://openalex.org/C29074008","wikidata":"https://www.wikidata.org/wiki/Q174925","display_name":"Analogue electronics","level":3,"score":0.39910000562667847},{"id":"https://openalex.org/C162932704","wikidata":"https://www.wikidata.org/wiki/Q1058791","display_name":"Synchronizing","level":3,"score":0.36039999127388},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3472999930381775},{"id":"https://openalex.org/C2780451532","wikidata":"https://www.wikidata.org/wiki/Q759676","display_name":"Task (project management)","level":2,"score":0.3375999927520752},{"id":"https://openalex.org/C138331895","wikidata":"https://www.wikidata.org/wiki/Q11650","display_name":"Electronics","level":2,"score":0.3255000114440918},{"id":"https://openalex.org/C114466953","wikidata":"https://www.wikidata.org/wiki/Q6034165","display_name":"Initialization","level":2,"score":0.30979999899864197},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.30970001220703125},{"id":"https://openalex.org/C188817802","wikidata":"https://www.wikidata.org/wiki/Q13426855","display_name":"Physical design","level":3,"score":0.3041999936103821},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.2985999882221222},{"id":"https://openalex.org/C64260653","wikidata":"https://www.wikidata.org/wiki/Q1194864","display_name":"Electronic design automation","level":2,"score":0.295199990272522},{"id":"https://openalex.org/C2777212361","wikidata":"https://www.wikidata.org/wiki/Q5127848","display_name":"Class (philosophy)","level":2,"score":0.2881999909877777},{"id":"https://openalex.org/C133731056","wikidata":"https://www.wikidata.org/wiki/Q4917288","display_name":"Control engineering","level":1,"score":0.2759000062942505},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.27390000224113464},{"id":"https://openalex.org/C2777466363","wikidata":"https://www.wikidata.org/wiki/Q17008971","display_name":"Design tool","level":2,"score":0.27300000190734863},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.26249998807907104},{"id":"https://openalex.org/C31352089","wikidata":"https://www.wikidata.org/wiki/Q3750474","display_name":"Systems design","level":2,"score":0.2603999972343445}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/iccad66269.2025.11240818","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccad66269.2025.11240818","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE/ACM International Conference On Computer Aided Design (ICCAD)","raw_type":"proceedings-article"},{"id":"pmh:oai:lirias2repo.kuleuven.be:20.500.12942/782522","is_oa":false,"landing_page_url":"https://lirias.kuleuven.be/handle/20.500.12942/782522","pdf_url":null,"source":{"id":"https://openalex.org/S7407055369","display_name":"Lirias","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"acceptedVersion","is_accepted":true,"is_published":false,"raw_source_name":"2025 IEEE/ACM International Conference On Computer Aided Design (ICCAD), Munich, Germany","raw_type":"info:eu-repo/semantics/publishedVersion"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":21,"referenced_works":["https://openalex.org/W186730292","https://openalex.org/W2039300364","https://openalex.org/W2069345435","https://openalex.org/W2074046446","https://openalex.org/W2141776905","https://openalex.org/W2165666706","https://openalex.org/W2192203593","https://openalex.org/W2798600128","https://openalex.org/W3036532492","https://openalex.org/W3092618035","https://openalex.org/W3214148892","https://openalex.org/W3214495641","https://openalex.org/W4297990030","https://openalex.org/W4386764190","https://openalex.org/W4386764902","https://openalex.org/W4393065402","https://openalex.org/W4404133818","https://openalex.org/W4406800520","https://openalex.org/W4409306182","https://openalex.org/W4409346832","https://openalex.org/W4411949947"],"related_works":[],"abstract_inverted_index":{"Analog/mixed-signal":[0],"circuits":[1,152],"are":[2],"key":[3],"for":[4,47,84,150,198],"interfacing":[5],"electronics":[6],"with":[7,128],"the":[8,27,45,56,60,65,73,108,113,120,125,161],"physical":[9],"world.":[10],"Their":[11],"design,":[12],"however,":[13],"remains":[14],"a":[15,52,79,95,141,195,204],"largely":[16],"handcrafted":[17],"process,":[18],"resulting":[19,66],"in":[20,207],"long":[21],"and":[22,34,86,116,156,171,186,203],"error-prone":[23],"design":[24,67,114,122,200,216],"cycles.":[25],"While":[26],"recent":[28],"rise":[29],"of":[30,62,64,72,153],"AI-based":[31],"reinforcement":[32,172],"learning":[33,173],"generative":[35],"AI":[36,82,211],"has":[37],"created":[38],"new":[39,205],"techniques":[40],"to":[41,106,111,117,159,182,187],"automate":[42],"this":[43,194],"task,":[44],"need":[46],"many":[48],"time-consuming":[49],"simulations":[50],"is":[51,91,148,157],"critical":[53],"bottleneck":[54],"hindering":[55],"overall":[57],"efficiency.":[58,144],"Furthermore,":[59],"lack":[61],"explainability":[63,192],"solutions":[68],"hampers":[69],"widespread":[70],"adoption":[71],"tools.":[74],"To":[75],"address":[76],"these":[77],"issues,":[78],"novel":[80],"agentic":[81],"framework":[83,147],"sample-efficient":[85],"explainable":[87],"analog":[88,199,208],"circuit":[89,109],"sizing":[90,162],"presented.":[92],"It":[93],"employs":[94],"multi-agent":[96],"workflow":[97],"where":[98,210],"specialized":[99],"Large":[100],"Language":[101],"Model":[102],"(LLM)-based":[103],"agents":[104,212],"collaborate":[105],"interpret":[107],"topology,":[110],"understand":[112],"goals,":[115],"iteratively":[118],"refine":[119],"circuit\u2019s":[121],"parameters":[123],"towards":[124],"target":[126],"goals":[127],"human-interpretable":[129],"reasoning.":[130],"The":[131,145,175,190],"adaptive":[132],"simulation":[133],"strategy":[134],"creates":[135],"an":[136],"intelligent":[137],"control":[138],"that":[139],"yields":[140],"high":[142],"sample":[143],"AnaFlow":[146],"demonstrated":[149],"two":[151],"varying":[154],"complexity":[155],"able":[158],"complete":[160],"task":[163],"fully":[164],"automatically,":[165],"differently":[166],"from":[167,178],"pure":[168],"Bayesian":[169],"optimization":[170,180],"approaches.":[174],"system":[176],"learns":[177],"its":[179],"history":[181],"avoid":[183],"past":[184],"mistakes":[185],"accelerate":[188],"convergence.":[189],"inherent":[191],"makes":[193],"powerful":[196],"tool":[197],"space":[201],"exploration":[202],"paradigm":[206],"EDA,":[209],"serve":[213],"as":[214],"transparent":[215],"assistants.":[217]},"counts_by_year":[],"updated_date":"2026-03-20T23:20:44.827607","created_date":"2025-11-20T00:00:00"}
