{"id":"https://openalex.org/W4416429777","doi":"https://doi.org/10.1109/iccad66269.2025.11240779","title":"Invited Paper: 2025 ICCAD CAD Contest Problem B: Power and Timing Optimization Using Multibit Flip-Flop","display_name":"Invited Paper: 2025 ICCAD CAD Contest Problem B: Power and Timing Optimization Using Multibit Flip-Flop","publication_year":2025,"publication_date":"2025-10-26","ids":{"openalex":"https://openalex.org/W4416429777","doi":"https://doi.org/10.1109/iccad66269.2025.11240779"},"language":null,"primary_location":{"id":"doi:10.1109/iccad66269.2025.11240779","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccad66269.2025.11240779","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE/ACM International Conference On Computer Aided Design (ICCAD)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5111512619","display_name":"Shengwei Yang","orcid":null},"institutions":[{"id":"https://openalex.org/I1335490905","display_name":"Synopsys (Switzerland)","ror":"https://ror.org/03mb54f81","country_code":"CH","type":"company","lineage":["https://openalex.org/I1335490905","https://openalex.org/I4210088951"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Sheng-Wei Yang","raw_affiliation_strings":["Synopsys, Inc,Hsinchu,Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Synopsys, Inc,Hsinchu,Taiwan","institution_ids":["https://openalex.org/I1335490905"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5012907026","display_name":"Jhih-Wei Hsu","orcid":"https://orcid.org/0000-0001-7436-1763"},"institutions":[{"id":"https://openalex.org/I1335490905","display_name":"Synopsys (Switzerland)","ror":"https://ror.org/03mb54f81","country_code":"CH","type":"company","lineage":["https://openalex.org/I1335490905","https://openalex.org/I4210088951"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Jhih-Wei Hsu","raw_affiliation_strings":["Synopsys, Inc,Hsinchu,Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Synopsys, Inc,Hsinchu,Taiwan","institution_ids":["https://openalex.org/I1335490905"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103038452","display_name":"Yu\u2010Hsuan Cheng","orcid":"https://orcid.org/0000-0003-1624-2154"},"institutions":[{"id":"https://openalex.org/I1335490905","display_name":"Synopsys (Switzerland)","ror":"https://ror.org/03mb54f81","country_code":"CH","type":"company","lineage":["https://openalex.org/I1335490905","https://openalex.org/I4210088951"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Yu-Hsuan Cheng","raw_affiliation_strings":["Synopsys, Inc,Hsinchu,Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Synopsys, Inc,Hsinchu,Taiwan","institution_ids":["https://openalex.org/I1335490905"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5079364098","display_name":"Chin-Fang Cindy Shen","orcid":null},"institutions":[{"id":"https://openalex.org/I1335490905","display_name":"Synopsys (Switzerland)","ror":"https://ror.org/03mb54f81","country_code":"CH","type":"company","lineage":["https://openalex.org/I1335490905","https://openalex.org/I4210088951"]}],"countries":["CH"],"is_corresponding":false,"raw_author_name":"Chin-Fang Cindy Shen","raw_affiliation_strings":["Synopsys, Inc,Hsinchu,Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Synopsys, Inc,Hsinchu,Taiwan","institution_ids":["https://openalex.org/I1335490905"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.30202196,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.7972999811172485,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.7972999811172485,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.0746999979019165,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.0406000018119812,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/benchmarking","display_name":"Benchmarking","score":0.6322000026702881},{"id":"https://openalex.org/keywords/electronic-design-automation","display_name":"Electronic design automation","score":0.520799994468689},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.4925000071525574},{"id":"https://openalex.org/keywords/correctness","display_name":"Correctness","score":0.47749999165534973},{"id":"https://openalex.org/keywords/traceability","display_name":"Traceability","score":0.40790000557899475},{"id":"https://openalex.org/keywords/contest","display_name":"CONTEST","score":0.35199999809265137},{"id":"https://openalex.org/keywords/semiconductor-device-fabrication","display_name":"Semiconductor device fabrication","score":0.335099995136261},{"id":"https://openalex.org/keywords/optimization-problem","display_name":"Optimization problem","score":0.32829999923706055},{"id":"https://openalex.org/keywords/physical-design","display_name":"Physical design","score":0.32269999384880066}],"concepts":[{"id":"https://openalex.org/C86251818","wikidata":"https://www.wikidata.org/wiki/Q816754","display_name":"Benchmarking","level":2,"score":0.6322000026702881},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5778999924659729},{"id":"https://openalex.org/C64260653","wikidata":"https://www.wikidata.org/wiki/Q1194864","display_name":"Electronic design automation","level":2,"score":0.520799994468689},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.4925000071525574},{"id":"https://openalex.org/C55439883","wikidata":"https://www.wikidata.org/wiki/Q360812","display_name":"Correctness","level":2,"score":0.47749999165534973},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.42250001430511475},{"id":"https://openalex.org/C153876917","wikidata":"https://www.wikidata.org/wiki/Q899704","display_name":"Traceability","level":2,"score":0.40790000557899475},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3547999858856201},{"id":"https://openalex.org/C2777582232","wikidata":"https://www.wikidata.org/wiki/Q5013414","display_name":"CONTEST","level":2,"score":0.35199999809265137},{"id":"https://openalex.org/C13736549","wikidata":"https://www.wikidata.org/wiki/Q4489420","display_name":"Industrial engineering","level":1,"score":0.33869999647140503},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.3366999924182892},{"id":"https://openalex.org/C66018809","wikidata":"https://www.wikidata.org/wiki/Q1570432","display_name":"Semiconductor device fabrication","level":3,"score":0.335099995136261},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.33469998836517334},{"id":"https://openalex.org/C137836250","wikidata":"https://www.wikidata.org/wiki/Q984063","display_name":"Optimization problem","level":2,"score":0.32829999923706055},{"id":"https://openalex.org/C188817802","wikidata":"https://www.wikidata.org/wiki/Q13426855","display_name":"Physical design","level":3,"score":0.32269999384880066},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.320499986410141},{"id":"https://openalex.org/C206345919","wikidata":"https://www.wikidata.org/wiki/Q20380951","display_name":"Resource (disambiguation)","level":2,"score":0.314300000667572},{"id":"https://openalex.org/C194789388","wikidata":"https://www.wikidata.org/wiki/Q17855283","display_name":"CAD","level":2,"score":0.3043000102043152},{"id":"https://openalex.org/C115901376","wikidata":"https://www.wikidata.org/wiki/Q184199","display_name":"Automation","level":2,"score":0.3025999963283539},{"id":"https://openalex.org/C168292644","wikidata":"https://www.wikidata.org/wiki/Q10860336","display_name":"Power optimization","level":4,"score":0.30000001192092896},{"id":"https://openalex.org/C2780233690","wikidata":"https://www.wikidata.org/wiki/Q535347","display_name":"Transparency (behavior)","level":2,"score":0.2962000072002411},{"id":"https://openalex.org/C138852830","wikidata":"https://www.wikidata.org/wiki/Q2292993","display_name":"Design methods","level":2,"score":0.2849000096321106},{"id":"https://openalex.org/C539667460","wikidata":"https://www.wikidata.org/wiki/Q2414942","display_name":"Management science","level":1,"score":0.28360000252723694},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.28040000796318054},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.2800999879837036},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.2791000008583069},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.27480000257492065},{"id":"https://openalex.org/C204241405","wikidata":"https://www.wikidata.org/wiki/Q461499","display_name":"Transformation (genetics)","level":3,"score":0.2685000002384186},{"id":"https://openalex.org/C29202148","wikidata":"https://www.wikidata.org/wiki/Q287260","display_name":"Resource allocation","level":2,"score":0.26429998874664307},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.2619999945163727},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.25780001282691956},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.25060001015663147}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iccad66269.2025.11240779","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccad66269.2025.11240779","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE/ACM International Conference On Computer Aided Design (ICCAD)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":3,"referenced_works":["https://openalex.org/W2404274178","https://openalex.org/W2936566841","https://openalex.org/W4312121164"],"related_works":[],"abstract_inverted_index":{"Contemporary":[0],"semiconductor":[1,116],"fabrication":[2],"nodes":[3],"present":[4],"escalating":[5],"challenges":[6,112],"in":[7,32,114],"achieving":[8],"optimal":[9],"power-performance-area":[10],"(PPA)":[11],"trade-offs,":[12],"necessitating":[13],"sophisticated":[14],"optimization":[15,35,111,146,154,164,196],"methodologies":[16],"for":[17,191],"digital":[18],"circuit":[19,153],"design.":[20],"The":[21,119,166],"2025":[22,168],"ICCAD":[23],"CAD":[24],"Contest":[25],"Problem":[26],"B":[27],"[1]":[28],"introduces":[29,121],"significant":[30],"advances":[31],"multibit":[33,162,194],"flip-flop":[34,163,195],"research,":[36],"establishing":[37],"a":[38,99],"comprehensive":[39,105],"benchmarking":[40],"framework":[41,120,169],"that":[42,103],"bridges":[43],"theoretical":[44],"algorithm":[45,179],"development":[46],"with":[47,151,175],"practical":[48],"industrial":[49],"implementation":[50],"requirements.":[51],"This":[52],"enhanced":[53,87,167],"contest":[54],"platform,":[55],"building":[56],"upon":[57],"the":[58,62,70,159,171],"foundational":[59],"work":[60],"of":[61,161],"2024":[63],"iteration":[64],"[2],":[65],"delivers":[66],"unprecedented":[67,176],"contributions":[68],"to":[69,158],"electronic":[71],"design":[72,117,139],"automation":[73],"(EDA)":[74],"research":[75,96,123,148,173],"community":[76,174],"through":[77],"mandatory":[78],"operation":[79],"traceability":[80],"protocols,":[81],"industry-standard":[82],"LEF/DEF":[83],"format":[84],"integration,":[85],"and":[86,133,144,186],"computational":[88],"resource":[89],"allocation":[90],"(16-core":[91],"processing":[92],"capability).":[93],"Our":[94],"primary":[95],"contribution":[97],"establishes":[98],"rigorous":[100],"validation":[101,131],"infrastructure":[102],"enables":[104],"algorithmic":[106],"transparency":[107],"while":[108,156],"addressing":[109],"real-world":[110],"encountered":[113],"production":[115],"flows.":[118],"innovative":[122],"enablers":[124],"including":[125],"complete":[126],"transformation":[127,182],"audit":[128],"trails,":[129],"cross-platform":[130],"compatibility,":[132],"systematic":[134],"performance":[135,188],"evaluation":[136],"under":[137],"authentic":[138],"constraints.":[140],"Through":[141],"strategic":[142],"banking":[143],"debanking":[145],"techniques,":[147],"participants":[149],"engage":[150],"fundamental":[152],"trade-offs":[155],"contributing":[157],"advancement":[160],"science.":[165],"provides":[170],"global":[172],"insights":[177],"into":[178],"behavior":[180],"patterns,":[181],"correctness":[183],"verification":[184],"methodologies,":[185],"scalable":[187],"characteristics\u2014essential":[189],"foundations":[190],"advancing":[192],"state-of-the-art":[193],"research.":[197]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-11-20T00:00:00"}
