{"id":"https://openalex.org/W4416429945","doi":"https://doi.org/10.1109/iccad66269.2025.11240675","title":"ASTRA: Automatic Sizing of Transistors with Reasoning Agents","display_name":"ASTRA: Automatic Sizing of Transistors with Reasoning Agents","publication_year":2025,"publication_date":"2025-10-26","ids":{"openalex":"https://openalex.org/W4416429945","doi":"https://doi.org/10.1109/iccad66269.2025.11240675"},"language":null,"primary_location":{"id":"doi:10.1109/iccad66269.2025.11240675","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccad66269.2025.11240675","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE/ACM International Conference On Computer Aided Design (ICCAD)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5020806445","display_name":"Wei Xing","orcid":"https://orcid.org/0000-0002-3177-8478"},"institutions":[{"id":"https://openalex.org/I91136226","display_name":"University of Sheffield","ror":"https://ror.org/05krs5044","country_code":"GB","type":"education","lineage":["https://openalex.org/I91136226"]}],"countries":["GB"],"is_corresponding":true,"raw_author_name":"Wei W. Xing","raw_affiliation_strings":["University of Sheffield,School of Mathematical and Physical Science"],"affiliations":[{"raw_affiliation_string":"University of Sheffield,School of Mathematical and Physical Science","institution_ids":["https://openalex.org/I91136226"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5120462539","display_name":"Baowen Ou","orcid":null},"institutions":[{"id":"https://openalex.org/I180726961","display_name":"Shenzhen University","ror":"https://ror.org/01vy4gh70","country_code":"CN","type":"education","lineage":["https://openalex.org/I180726961"]},{"id":"https://openalex.org/I4210164269","display_name":"Shenzhen Nanshan Center for Chronic Disease Control","ror":"https://ror.org/05h3xe829","country_code":"CN","type":"healthcare","lineage":["https://openalex.org/I4210164269"]},{"id":"https://openalex.org/I4210111925","display_name":"Shenzhen Chronic Disease Prevention Center","ror":"https://ror.org/0218xmz21","country_code":"CN","type":"healthcare","lineage":["https://openalex.org/I4210111925"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Baowen Ou","raw_affiliation_strings":["Shenzhen University,School of Mechatronic Control Engineering"],"affiliations":[{"raw_affiliation_string":"Shenzhen University,School of Mechatronic Control Engineering","institution_ids":["https://openalex.org/I4210164269","https://openalex.org/I4210111925","https://openalex.org/I180726961"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100319907","display_name":"Yuxuan Zhang","orcid":"https://orcid.org/0000-0002-4639-4944"},"institutions":[{"id":"https://openalex.org/I82880672","display_name":"Beihang University","ror":"https://ror.org/00wk2mp56","country_code":"CN","type":"education","lineage":["https://openalex.org/I82880672"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yuxuan Zhang","raw_affiliation_strings":["Beihang University,School of Integrated Circuit"],"affiliations":[{"raw_affiliation_string":"Beihang University,School of Integrated Circuit","institution_ids":["https://openalex.org/I82880672"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5108323692","display_name":"Zhuohua Liu","orcid":"https://orcid.org/0009-0001-2415-793X"},"institutions":[{"id":"https://openalex.org/I82880672","display_name":"Beihang University","ror":"https://ror.org/00wk2mp56","country_code":"CN","type":"education","lineage":["https://openalex.org/I82880672"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhuohua Liu","raw_affiliation_strings":["Beihang University,School of Integrated Circuit"],"affiliations":[{"raw_affiliation_string":"Beihang University,School of Integrated Circuit","institution_ids":["https://openalex.org/I82880672"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5101698140","display_name":"Yuanqi Hu","orcid":"https://orcid.org/0000-0001-9179-6603"},"institutions":[{"id":"https://openalex.org/I82880672","display_name":"Beihang University","ror":"https://ror.org/00wk2mp56","country_code":"CN","type":"education","lineage":["https://openalex.org/I82880672"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yuanqi Hu","raw_affiliation_strings":["Beihang University,School of Integrated Circuit"],"affiliations":[{"raw_affiliation_string":"Beihang University,School of Integrated Circuit","institution_ids":["https://openalex.org/I82880672"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5020806445"],"corresponding_institution_ids":["https://openalex.org/I91136226"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.37732751,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"9"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9401000142097473,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9401000142097473,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.009600000455975533,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11948","display_name":"Machine Learning in Materials Science","score":0.00419999985024333,"subfield":{"id":"https://openalex.org/subfields/2505","display_name":"Materials Chemistry"},"field":{"id":"https://openalex.org/fields/25","display_name":"Materials Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/initialization","display_name":"Initialization","score":0.5724999904632568},{"id":"https://openalex.org/keywords/sizing","display_name":"Sizing","score":0.5691999793052673},{"id":"https://openalex.org/keywords/context","display_name":"Context (archaeology)","score":0.5659999847412109},{"id":"https://openalex.org/keywords/key","display_name":"Key (lock)","score":0.4912000000476837},{"id":"https://openalex.org/keywords/domain","display_name":"Domain (mathematical analysis)","score":0.49070000648498535},{"id":"https://openalex.org/keywords/astra","display_name":"ASTRA","score":0.4812000095844269},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.4251999855041504}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6588000059127808},{"id":"https://openalex.org/C114466953","wikidata":"https://www.wikidata.org/wiki/Q6034165","display_name":"Initialization","level":2,"score":0.5724999904632568},{"id":"https://openalex.org/C2777767291","wikidata":"https://www.wikidata.org/wiki/Q1080291","display_name":"Sizing","level":2,"score":0.5691999793052673},{"id":"https://openalex.org/C2779343474","wikidata":"https://www.wikidata.org/wiki/Q3109175","display_name":"Context (archaeology)","level":2,"score":0.5659999847412109},{"id":"https://openalex.org/C26517878","wikidata":"https://www.wikidata.org/wiki/Q228039","display_name":"Key (lock)","level":2,"score":0.4912000000476837},{"id":"https://openalex.org/C36503486","wikidata":"https://www.wikidata.org/wiki/Q11235244","display_name":"Domain (mathematical analysis)","level":2,"score":0.49070000648498535},{"id":"https://openalex.org/C2776902872","wikidata":"https://www.wikidata.org/wiki/Q352410","display_name":"ASTRA","level":2,"score":0.4812000095844269},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.4251999855041504},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.3946000039577484},{"id":"https://openalex.org/C2778049539","wikidata":"https://www.wikidata.org/wiki/Q17002908","display_name":"Bayesian optimization","level":2,"score":0.3675999939441681},{"id":"https://openalex.org/C2777303404","wikidata":"https://www.wikidata.org/wiki/Q759757","display_name":"Convergence (economics)","level":2,"score":0.30869999527931213},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.2865000069141388},{"id":"https://openalex.org/C207685749","wikidata":"https://www.wikidata.org/wiki/Q2088941","display_name":"Domain knowledge","level":2,"score":0.28220000863075256},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.2809999883174896},{"id":"https://openalex.org/C137836250","wikidata":"https://www.wikidata.org/wiki/Q984063","display_name":"Optimization problem","level":2,"score":0.2531999945640564},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.2529999911785126},{"id":"https://openalex.org/C190560348","wikidata":"https://www.wikidata.org/wiki/Q3245116","display_name":"Circuit design","level":2,"score":0.25209999084472656}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iccad66269.2025.11240675","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccad66269.2025.11240675","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE/ACM International Conference On Computer Aided Design (ICCAD)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":29,"referenced_works":["https://openalex.org/W2061144551","https://openalex.org/W2092939357","https://openalex.org/W2125847307","https://openalex.org/W2192203593","https://openalex.org/W2475898412","https://openalex.org/W2769791151","https://openalex.org/W2786693279","https://openalex.org/W2794900789","https://openalex.org/W2900070061","https://openalex.org/W2962824535","https://openalex.org/W2992248052","https://openalex.org/W2998166751","https://openalex.org/W2998431217","https://openalex.org/W3013336438","https://openalex.org/W3040947815","https://openalex.org/W3121642476","https://openalex.org/W3139016650","https://openalex.org/W3169517138","https://openalex.org/W3204161648","https://openalex.org/W3213635425","https://openalex.org/W4210287482","https://openalex.org/W4226408629","https://openalex.org/W4252003911","https://openalex.org/W4377079739","https://openalex.org/W4391402589","https://openalex.org/W4401070628","https://openalex.org/W4401568381","https://openalex.org/W4404782964","https://openalex.org/W4409306182"],"related_works":[],"abstract_inverted_index":{"Advancing":[0],"technology":[1],"nodes":[2],"have":[3],"significantly":[4],"increased":[5],"the":[6,52],"complexity":[7],"of":[8,24,41,114],"transistor":[9,128],"sizing":[10,129],"in":[11,33],"analog":[12,157,186],"circuit":[13,187],"design.":[14],"Although":[15],"artificial":[16],"intelligence":[17],"(AI)":[18],"techniques":[19],"show":[20],"potential,":[21],"their":[22],"lack":[23],"integrated":[25],"domain":[26,67],"expertise":[27],"often":[28],"leads":[29],"to":[30,57,88,119,167],"slow":[31],"convergence":[32],"practical":[34],"applications.":[35],"We":[36],"propose":[37],"ASTRA":[38,74,115,142,159],"(Automatic":[39],"Sizing":[40],"Transistors":[42],"with":[43,108,122],"Reasoning":[44],"Agents),":[45],"a":[46,76,180],"novel":[47],"optimization":[48,99,163],"framework":[49,183],"that":[50,83,147],"implements":[51],"Model":[53],"Context":[54],"Protocol":[55],"(MCP)":[56],"create":[58],"structured":[59],"reasoning":[60,107],"pathways":[61],"between":[62],"Large":[63],"Language":[64],"Models":[65],"(LLMs),":[66],"knowledge":[68],"bases,":[69],"and":[70,96,123,151,172],"Bayesian":[71],"Optimization":[72],"(BO).":[73],"introduces":[75],"two-stage":[77],"process:":[78],"first,":[79],"MCP-guided":[80],"design":[81],"initialization":[82],"leverages":[84],"Retrieval-Augmented":[85],"Generation":[86],"(RAG)":[87],"quickly":[89],"identify":[90],"feasible":[91],"regions":[92],"using":[93],"gm/ID":[94],"methodology;":[95],"second,":[97],"BO-based":[98],"focused":[100],"on":[101,154],"critical":[102],"transistors,":[103],"identified":[104],"through":[105],"LLM":[106,140],"data-driven":[109,137],"validation.":[110],"A":[111],"key":[112],"innovation":[113],"is":[116],"its":[117,177],"ability":[118],"seamlessly":[120],"integrate":[121],"enhance":[124],"virtually":[125],"any":[126],"existing":[127],"algorithm":[130],"at":[131],"minimal":[132],"additional":[133],"cost.":[134],"Unlike":[135],"purely":[136],"or":[138],"black-box":[139],"approaches,":[141],"maintains":[143],"traceable":[144],"decision":[145],"processes":[146],"can":[148],"be":[149],"verified":[150],"refined.":[152],"Evaluated":[153],"three":[155],"real-world":[156],"circuits,":[158],"enhances":[160],"multiple":[161],"classical":[162],"methods,":[164],"achieving":[165],"up":[166],"4.35\u00d7":[168],"fewer":[169],"simulation":[170],"iterations":[171],"2.36\u00d7":[173],"performance":[174],"improvements,":[175],"demonstrating":[176],"effectiveness":[178],"as":[179],"general":[181],"open-source":[182],"for":[184],"advancing":[185],"sizing.":[188],"<sup":[189],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[190],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">1</sup>":[191]},"counts_by_year":[],"updated_date":"2026-03-07T16:01:11.037858","created_date":"2025-11-20T00:00:00"}
