{"id":"https://openalex.org/W4389166759","doi":"https://doi.org/10.1109/iccad57390.2023.10323991","title":"Thermally-Aware Multi-Core Chiplet Stacking","display_name":"Thermally-Aware Multi-Core Chiplet Stacking","publication_year":2023,"publication_date":"2023-10-28","ids":{"openalex":"https://openalex.org/W4389166759","doi":"https://doi.org/10.1109/iccad57390.2023.10323991"},"language":"en","primary_location":{"id":"doi:10.1109/iccad57390.2023.10323991","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccad57390.2023.10323991","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5061301507","display_name":"Gaurav Kothari","orcid":"https://orcid.org/0000-0002-5375-1137"},"institutions":[{"id":"https://openalex.org/I123946342","display_name":"Binghamton University","ror":"https://ror.org/008rmbt77","country_code":"US","type":"education","lineage":["https://openalex.org/I123946342"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Gaurav Kothari","raw_affiliation_strings":["State University of New York at Binghamton,USA","State University of New York at Binghamton, USA"],"affiliations":[{"raw_affiliation_string":"State University of New York at Binghamton,USA","institution_ids":["https://openalex.org/I123946342"]},{"raw_affiliation_string":"State University of New York at Binghamton, USA","institution_ids":["https://openalex.org/I123946342"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5043921638","display_name":"Kanad Ghose","orcid":"https://orcid.org/0000-0002-5509-6543"},"institutions":[{"id":"https://openalex.org/I123946342","display_name":"Binghamton University","ror":"https://ror.org/008rmbt77","country_code":"US","type":"education","lineage":["https://openalex.org/I123946342"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Kanad Ghose","raw_affiliation_strings":["State University of New York at Binghamton,USA","State University of New York at Binghamton, USA"],"affiliations":[{"raw_affiliation_string":"State University of New York at Binghamton,USA","institution_ids":["https://openalex.org/I123946342"]},{"raw_affiliation_string":"State University of New York at Binghamton, USA","institution_ids":["https://openalex.org/I123946342"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5061301507"],"corresponding_institution_ids":["https://openalex.org/I123946342"],"apc_list":null,"apc_paid":null,"fwci":0.5355,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.66044104,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"9"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/stacking","display_name":"Stacking","score":0.770423948764801},{"id":"https://openalex.org/keywords/floorplan","display_name":"Floorplan","score":0.6872074604034424},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6786575317382812},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.5257419347763062},{"id":"https://openalex.org/keywords/three-dimensional-integrated-circuit","display_name":"Three-dimensional integrated circuit","score":0.5006208419799805},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.47209519147872925},{"id":"https://openalex.org/keywords/stack","display_name":"Stack (abstract data type)","score":0.45605820417404175},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.43670979142189026},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.4284052848815918},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4120139479637146},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.18807759881019592},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.1379147171974182}],"concepts":[{"id":"https://openalex.org/C33347731","wikidata":"https://www.wikidata.org/wiki/Q285210","display_name":"Stacking","level":2,"score":0.770423948764801},{"id":"https://openalex.org/C130145326","wikidata":"https://www.wikidata.org/wiki/Q1553985","display_name":"Floorplan","level":2,"score":0.6872074604034424},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6786575317382812},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.5257419347763062},{"id":"https://openalex.org/C59088047","wikidata":"https://www.wikidata.org/wiki/Q229370","display_name":"Three-dimensional integrated circuit","level":3,"score":0.5006208419799805},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.47209519147872925},{"id":"https://openalex.org/C9395851","wikidata":"https://www.wikidata.org/wiki/Q177929","display_name":"Stack (abstract data type)","level":2,"score":0.45605820417404175},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.43670979142189026},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.4284052848815918},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4120139479637146},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.18807759881019592},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.1379147171974182},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C46141821","wikidata":"https://www.wikidata.org/wiki/Q209402","display_name":"Nuclear magnetic resonance","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iccad57390.2023.10323991","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccad57390.2023.10323991","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":28,"referenced_works":["https://openalex.org/W1505816907","https://openalex.org/W1541633348","https://openalex.org/W1754856191","https://openalex.org/W1981153984","https://openalex.org/W2021320789","https://openalex.org/W2027829345","https://openalex.org/W2076263604","https://openalex.org/W2102694790","https://openalex.org/W2113790294","https://openalex.org/W2129960401","https://openalex.org/W2133044942","https://openalex.org/W2151236447","https://openalex.org/W2154001575","https://openalex.org/W2212524031","https://openalex.org/W2337228275","https://openalex.org/W2509008645","https://openalex.org/W2612387305","https://openalex.org/W2947723533","https://openalex.org/W2953072311","https://openalex.org/W3047935475","https://openalex.org/W3111684448","https://openalex.org/W4220943275","https://openalex.org/W4220980777","https://openalex.org/W4246839582","https://openalex.org/W4291517417","https://openalex.org/W6644184184","https://openalex.org/W6681797429","https://openalex.org/W6703177460"],"related_works":["https://openalex.org/W2184170131","https://openalex.org/W2330571978","https://openalex.org/W2076263604","https://openalex.org/W2028082191","https://openalex.org/W2886805502","https://openalex.org/W2994788014","https://openalex.org/W1965050610","https://openalex.org/W2809933636","https://openalex.org/W1990789187","https://openalex.org/W2032655623"],"abstract_inverted_index":{"Heterogeneous":[0],"integration":[1],"has":[2],"enabled":[3],"the":[4,35,48,53,80,106,126],"interconnection":[5,55],"of":[6,25],"chiplets":[7],"in":[8,34,57,79],"2.5D":[9],"and":[10,63,86,93,109,158],"3D":[11,81],"configurations":[12],"within":[13],"a":[14,17,141,150],"package.":[15],"Stacking":[16],"high-performance":[18],"multi-core":[19,101,135,152],"processor":[20],"chip":[21,59],"let":[22],"on":[23,140],"top":[24],"another":[26],"is":[27],"challenging":[28],"due":[29],"to":[30,114,124],"hot":[31,73],"spot":[32],"exacerbation":[33],"stack.":[36],"Temperature-induced":[37],"DVFS":[38],"throttling":[39,112],"defeats":[40],"any":[41],"potential":[42],"performance":[43,111,132,154],"gain":[44],"that":[45,69],"results":[46],"from":[47,76],"shorter":[49],"vertical":[50],"connections":[51],"in-between":[52],"on-chip":[54,127],"networks":[56],"each":[58,77],"let.":[60],"We":[61],"present":[62],"evaluate":[64],"minimally-invasive":[65],"floor-plan":[66],"transformation":[67],"techniques":[68,104,137],"space":[70],"out":[71],"chiplet":[72,102,116],"spots":[74],"away":[75],"other":[78],"stack":[82],"using":[83,149],"layout":[84],"mirroring":[85],"offsetting.":[87],"Chiplet":[88],"redesign":[89],"efforts":[90],"are":[91,96,121,138],"reduced,":[92],"cycle":[94],"times":[95],"preserved.":[97],"The":[98,134],"resulting":[99],"thermally-aware":[100],"stacking":[103,136],"reduce":[105],"peak":[107],"temperatures":[108],"temperature-induced":[110],"compared":[113],"naive":[115],"stacking.":[117],"Empty":[118],"offset":[119],"areas":[120],"then":[122],"used":[123],"extend":[125],"cache":[128],"capacity":[129],"for":[130],"further":[131],"improvement.":[133],"illustrated":[139],"14":[142],"nm":[143],"Intel":[144],"Skylake-SP-like":[145],"(server)":[146],"floorplan":[147],"model":[148],"cycle-level":[151],"CPU":[153],"simulator":[155],"incorporating":[156],"power":[157],"thermal":[159],"modeling":[160],"components.":[161]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}