{"id":"https://openalex.org/W4200043277","doi":"https://doi.org/10.1109/iccad51958.2021.9643521","title":"2021 ICCAD CAD Contest Problem C: GPU Accelerated Logic Rewriting","display_name":"2021 ICCAD CAD Contest Problem C: GPU Accelerated Logic Rewriting","publication_year":2021,"publication_date":"2021-11-01","ids":{"openalex":"https://openalex.org/W4200043277","doi":"https://doi.org/10.1109/iccad51958.2021.9643521"},"language":"en","primary_location":{"id":"doi:10.1109/iccad51958.2021.9643521","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccad51958.2021.9643521","pdf_url":null,"source":{"id":"https://openalex.org/S4363608354","display_name":"2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5061343824","display_name":"Ghasem Pasandi","orcid":"https://orcid.org/0000-0001-8865-9069"},"institutions":[{"id":"https://openalex.org/I4210127875","display_name":"Nvidia (United States)","ror":"https://ror.org/03jdj4y14","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127875"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Ghasem Pasandi","raw_affiliation_strings":["NVIDIA Corporation, Santa Clara, CA"],"affiliations":[{"raw_affiliation_string":"NVIDIA Corporation, Santa Clara, CA","institution_ids":["https://openalex.org/I4210127875"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5018159282","display_name":"Sreedhar Pratty","orcid":null},"institutions":[{"id":"https://openalex.org/I4210127875","display_name":"Nvidia (United States)","ror":"https://ror.org/03jdj4y14","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127875"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sreedhar Pratty","raw_affiliation_strings":["NVIDIA Corporation, Santa Clara, CA"],"affiliations":[{"raw_affiliation_string":"NVIDIA Corporation, Santa Clara, CA","institution_ids":["https://openalex.org/I4210127875"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100684198","display_name":"David L. Brown","orcid":"https://orcid.org/0000-0002-9505-2959"},"institutions":[{"id":"https://openalex.org/I4210127875","display_name":"Nvidia (United States)","ror":"https://ror.org/03jdj4y14","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127875"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"David Brown","raw_affiliation_strings":["NVIDIA Corporation, Austin, TX"],"affiliations":[{"raw_affiliation_string":"NVIDIA Corporation, Austin, TX","institution_ids":["https://openalex.org/I4210127875"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100612105","display_name":"Yanqing Zhang","orcid":"https://orcid.org/0000-0003-2349-1925"},"institutions":[{"id":"https://openalex.org/I4210127875","display_name":"Nvidia (United States)","ror":"https://ror.org/03jdj4y14","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127875"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Yanqing Zhang","raw_affiliation_strings":["NVIDIA Corporation, Santa Clara, CA"],"affiliations":[{"raw_affiliation_string":"NVIDIA Corporation, Santa Clara, CA","institution_ids":["https://openalex.org/I4210127875"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5029928585","display_name":"Haoxing Ren","orcid":"https://orcid.org/0000-0003-1028-3860"},"institutions":[{"id":"https://openalex.org/I4210127875","display_name":"Nvidia (United States)","ror":"https://ror.org/03jdj4y14","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127875"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Haoxing Ren","raw_affiliation_strings":["NVIDIA Corporation, Austin, TX"],"affiliations":[{"raw_affiliation_string":"NVIDIA Corporation, Austin, TX","institution_ids":["https://openalex.org/I4210127875"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5010156116","display_name":"Brucek Khailany","orcid":"https://orcid.org/0000-0002-7584-3489"},"institutions":[{"id":"https://openalex.org/I4210127875","display_name":"Nvidia (United States)","ror":"https://ror.org/03jdj4y14","country_code":"US","type":"company","lineage":["https://openalex.org/I4210127875"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Brucek Khailany","raw_affiliation_strings":["NVIDIA Corporation, Austin, TX"],"affiliations":[{"raw_affiliation_string":"NVIDIA Corporation, Austin, TX","institution_ids":["https://openalex.org/I4210127875"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5061343824"],"corresponding_institution_ids":["https://openalex.org/I4210127875"],"apc_list":null,"apc_paid":null,"fwci":2.1968,"has_fulltext":false,"cited_by_count":9,"citation_normalized_percentile":{"value":0.88084112,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"6"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11338","display_name":"Advancements in Photolithography Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/rewriting","display_name":"Rewriting","score":0.8872373104095459},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7640486359596252},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4879991114139557},{"id":"https://openalex.org/keywords/confluence","display_name":"Confluence","score":0.4733712077140808},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.4409748911857605},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.42541128396987915},{"id":"https://openalex.org/keywords/theoretical-computer-science","display_name":"Theoretical computer science","score":0.42282694578170776},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3136695623397827},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.29096612334251404},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.21579939126968384}],"concepts":[{"id":"https://openalex.org/C154690210","wikidata":"https://www.wikidata.org/wiki/Q1668499","display_name":"Rewriting","level":2,"score":0.8872373104095459},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7640486359596252},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4879991114139557},{"id":"https://openalex.org/C77906462","wikidata":"https://www.wikidata.org/wiki/Q1140902","display_name":"Confluence","level":2,"score":0.4733712077140808},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.4409748911857605},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.42541128396987915},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.42282694578170776},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3136695623397827},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.29096612334251404},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.21579939126968384},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iccad51958.2021.9643521","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccad51958.2021.9643521","pdf_url":null,"source":{"id":"https://openalex.org/S4363608354","display_name":"2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Industry, innovation and infrastructure","score":0.5400000214576721,"id":"https://metadata.un.org/sdg/9"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W2100465945","https://openalex.org/W2105715355","https://openalex.org/W2945287965","https://openalex.org/W3036696276","https://openalex.org/W3040114917","https://openalex.org/W3100098542"],"related_works":["https://openalex.org/W2463026518","https://openalex.org/W1761458962","https://openalex.org/W2504157767","https://openalex.org/W1515515243","https://openalex.org/W4206221271","https://openalex.org/W3172487478","https://openalex.org/W2475418661","https://openalex.org/W1504820687","https://openalex.org/W2491573813","https://openalex.org/W2154047167"],"abstract_inverted_index":{"Logic":[0],"rewriting":[1,42,55,75,117,138],"is":[2,77,96],"an":[3],"important":[4],"optimization":[5,19],"function":[6,20],"that":[7,95],"can":[8,58],"improve":[9],"Quality":[10],"of":[11,109],"Results":[12],"(QoR)":[13],"in":[14,46,112],"modern":[15],"VLSI":[16],"circuits.":[17,66],"This":[18],"usually":[21],"has":[22],"a":[23,114],"greedy":[24],"approach":[25],"and":[26,35,37],"involves":[27],"steps":[28,83],"such":[29],"as":[30,124,126],"graph":[31],"traversal,":[32],"cut":[33],"computation":[34],"ranking,":[36],"functional":[38],"matching.":[39],"For":[40],"logic":[41,74,116,137],"to":[43,70,78,84,89,132],"be":[44,52,59,130],"effective":[45,68],"improving":[47],"the":[48,73,102,107,134],"QoR,":[49],"there":[50],"should":[51],"many":[53],"local":[54],"iterations":[56],"which":[57],"very":[60],"slow":[61],"for":[62],"industrial":[63],"level":[64],"benchmark":[65,122],"One":[67],"solution":[69],"speed":[71],"up":[72],"operation":[76],"upload":[79],"its":[80],"time":[81],"consuming":[82],"Graphics":[85],"Processing":[86],"Units":[87],"(GPUs)":[88],"benefit":[90],"from":[91],"massively":[92],"parallel":[93],"computations":[94],"available":[97],"there.":[98],"In":[99],"this":[100],"regard,":[101],"present":[103],"contest":[104],"problem":[105],"studies":[106],"possibility":[108],"using":[110],"GPUs":[111],"accelerating":[113],"classical":[115],"function.":[118,139],"State-of-the-art":[119],"large-scale":[120],"open-source":[121],"circuits":[123],"well":[125],"industrial-level":[127],"designs":[128],"will":[129],"used":[131],"test":[133],"GPU":[135],"accelerated":[136]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":1}],"updated_date":"2026-03-12T08:34:05.389933","created_date":"2025-10-10T00:00:00"}
