{"id":"https://openalex.org/W2997725831","doi":"https://doi.org/10.1109/iccad45719.2019.8942112","title":"SCRIP: Secure Random Clock Execution on Soft Processor Systems to Mitigate Power-based Side Channel Attacks","display_name":"SCRIP: Secure Random Clock Execution on Soft Processor Systems to Mitigate Power-based Side Channel Attacks","publication_year":2019,"publication_date":"2019-11-01","ids":{"openalex":"https://openalex.org/W2997725831","doi":"https://doi.org/10.1109/iccad45719.2019.8942112","mag":"2997725831"},"language":"en","primary_location":{"id":"doi:10.1109/iccad45719.2019.8942112","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccad45719.2019.8942112","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5027719580","display_name":"Darshana Jayasinghe","orcid":"https://orcid.org/0000-0003-1910-4048"},"institutions":[{"id":"https://openalex.org/I31746571","display_name":"UNSW Sydney","ror":"https://ror.org/03r8z3t63","country_code":"AU","type":"education","lineage":["https://openalex.org/I31746571"]}],"countries":["AU"],"is_corresponding":false,"raw_author_name":"Darshana Jayasinghe","raw_affiliation_strings":["University of New South Wales, Sydney, Australia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of New South Wales, Sydney, Australia","institution_ids":["https://openalex.org/I31746571"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5079126989","display_name":"Aleksandar Ignjatovi\u0107","orcid":"https://orcid.org/0000-0001-7427-4934"},"institutions":[{"id":"https://openalex.org/I31746571","display_name":"UNSW Sydney","ror":"https://ror.org/03r8z3t63","country_code":"AU","type":"education","lineage":["https://openalex.org/I31746571"]}],"countries":["AU"],"is_corresponding":false,"raw_author_name":"Aleksandar Ignjatovic","raw_affiliation_strings":["University of New South Wales, Sydney, Australia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of New South Wales, Sydney, Australia","institution_ids":["https://openalex.org/I31746571"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5030042327","display_name":"Sri Parameswaran","orcid":"https://orcid.org/0000-0003-0435-9080"},"institutions":[{"id":"https://openalex.org/I31746571","display_name":"UNSW Sydney","ror":"https://ror.org/03r8z3t63","country_code":"AU","type":"education","lineage":["https://openalex.org/I31746571"]}],"countries":["AU"],"is_corresponding":false,"raw_author_name":"Sri Parameswaran","raw_affiliation_strings":["University of New South Wales, Sydney, Australia"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of New South Wales, Sydney, Australia","institution_ids":["https://openalex.org/I31746571"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I31746571"],"apc_list":null,"apc_paid":null,"fwci":0.2187,"has_fulltext":false,"cited_by_count":13,"citation_normalized_percentile":{"value":0.55154489,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":93,"max":98},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"7"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10951","display_name":"Cryptographic Implementations and Security","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11017","display_name":"Chaos-based Image/Signal Encryption","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11424","display_name":"Security and Verification in Computing","score":0.9965999722480774,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7881464958190918},{"id":"https://openalex.org/keywords/timing-attack","display_name":"Timing attack","score":0.6528870463371277},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5491065979003906},{"id":"https://openalex.org/keywords/side-channel-attack","display_name":"Side channel attack","score":0.5351499319076538},{"id":"https://openalex.org/keywords/reduced-instruction-set-computing","display_name":"Reduced instruction set computing","score":0.48385870456695557},{"id":"https://openalex.org/keywords/multi-core-processor","display_name":"Multi-core processor","score":0.44825053215026855},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.43314486742019653},{"id":"https://openalex.org/keywords/clock-rate","display_name":"Clock rate","score":0.43140357732772827},{"id":"https://openalex.org/keywords/cryptography","display_name":"Cryptography","score":0.4030291438102722},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.3843074440956116},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.28622186183929443},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.260120689868927},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.16845044493675232},{"id":"https://openalex.org/keywords/computer-security","display_name":"Computer security","score":0.1590169370174408}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7881464958190918},{"id":"https://openalex.org/C28420585","wikidata":"https://www.wikidata.org/wiki/Q2665075","display_name":"Timing attack","level":4,"score":0.6528870463371277},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5491065979003906},{"id":"https://openalex.org/C49289754","wikidata":"https://www.wikidata.org/wiki/Q2267081","display_name":"Side channel attack","level":3,"score":0.5351499319076538},{"id":"https://openalex.org/C126298526","wikidata":"https://www.wikidata.org/wiki/Q189376","display_name":"Reduced instruction set computing","level":3,"score":0.48385870456695557},{"id":"https://openalex.org/C78766204","wikidata":"https://www.wikidata.org/wiki/Q555032","display_name":"Multi-core processor","level":2,"score":0.44825053215026855},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.43314486742019653},{"id":"https://openalex.org/C178693496","wikidata":"https://www.wikidata.org/wiki/Q911691","display_name":"Clock rate","level":3,"score":0.43140357732772827},{"id":"https://openalex.org/C178489894","wikidata":"https://www.wikidata.org/wiki/Q8789","display_name":"Cryptography","level":2,"score":0.4030291438102722},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.3843074440956116},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.28622186183929443},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.260120689868927},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.16845044493675232},{"id":"https://openalex.org/C38652104","wikidata":"https://www.wikidata.org/wiki/Q3510521","display_name":"Computer security","level":1,"score":0.1590169370174408},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iccad45719.2019.8942112","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccad45719.2019.8942112","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":35,"referenced_works":["https://openalex.org/W49529705","https://openalex.org/W200116028","https://openalex.org/W750791596","https://openalex.org/W1519539754","https://openalex.org/W1543721789","https://openalex.org/W1562542037","https://openalex.org/W1580211761","https://openalex.org/W1613874182","https://openalex.org/W1688518862","https://openalex.org/W1790072549","https://openalex.org/W1972859418","https://openalex.org/W1983487478","https://openalex.org/W2037844954","https://openalex.org/W2062989416","https://openalex.org/W2078199274","https://openalex.org/W2112284176","https://openalex.org/W2117082663","https://openalex.org/W2125025555","https://openalex.org/W2133198962","https://openalex.org/W2136347482","https://openalex.org/W2154909745","https://openalex.org/W2157855196","https://openalex.org/W2186078203","https://openalex.org/W2406147923","https://openalex.org/W2640092413","https://openalex.org/W2807669647","https://openalex.org/W2949648031","https://openalex.org/W3028629999","https://openalex.org/W3032243497","https://openalex.org/W3148004637","https://openalex.org/W4235728027","https://openalex.org/W4251742697","https://openalex.org/W6713713203","https://openalex.org/W6752651163","https://openalex.org/W6778612545"],"related_works":["https://openalex.org/W3140642049","https://openalex.org/W2259783508","https://openalex.org/W241598521","https://openalex.org/W2039161392","https://openalex.org/W2183670552","https://openalex.org/W2904062476","https://openalex.org/W2058653714","https://openalex.org/W3014782383","https://openalex.org/W1488317276","https://openalex.org/W2529492782","https://openalex.org/W3091388819","https://openalex.org/W1519969013","https://openalex.org/W1521777246","https://openalex.org/W2341088863","https://openalex.org/W3009575833","https://openalex.org/W2041242068","https://openalex.org/W100205324","https://openalex.org/W2139234219","https://openalex.org/W3158986289","https://openalex.org/W2226146161"],"abstract_inverted_index":{"Power-based":[0],"side":[1],"channel":[2],"attacks":[3,86,228],"are":[4],"effective":[5],"in":[6],"revealing":[7],"the":[8,23,45,68,77,92,101,109,129,135,149,170,190,201,208,213,216,223,235,255,278],"secret":[9,136,150],"keys":[10],"of":[11,44,94,111,143,192,234,280],"cryptographic":[12],"algorithm":[13],"implementations":[14],"running":[15],"on":[16,67],"soft":[17,39,60,104,162,173,205,257],"processor":[18,40,61,105,164,174,195,236,258],"systems.":[19],"This":[20],"paper,":[21],"for":[22,123],"first":[24,256],"time,":[25],"proposes":[26],"a":[27,38,53,193,260],"clock":[28,55,80,113],"random":[29,54,81,95,112,261,281],"execution":[30,82],"methodology":[31],"(referred":[32],"to":[33,36,90,107,120,125,160,188,212,231,264],"as":[34,269],"SCRIP)":[35],"execute":[37],"core":[41,163],"and":[42,200,215,247,273],"most":[43,232],"components":[46,48,233],"(some":[47],"cannot":[49,152],"be":[50,121,153],"executed":[51,75],"with":[52,76,155,176,207,259],"frequency).":[56],"An":[57],"open":[58],"source":[59],"system":[62,175],"(LowRISC":[63],"which":[64,185,276],"is":[65,118,186,229,254],"based":[66],"RISC-V":[69,194],"Instruction":[70],"Set":[71],"Architecture)":[72],"has":[73,169,196],"been":[74],"proposed":[78],"SCRIP":[79,102,115,133,166,251],"methodology.":[83],"Power":[84],"analysis":[85,227],"(including":[87,237],"preprocessing":[88,266],"techniques":[89],"remove":[91,277],"effects":[93,110,279],"execution)":[96],"were":[97],"carried":[98],"out":[99],"against":[100,225],"LowRISC":[103,116,130,167,252],"implementation":[106,117,131,168,253],"test":[108,146],"execution.":[114,282],"shown":[119],"secure":[122],"up":[124],"300,000":[126],"encryptions,":[127],"while":[128],"without":[132],"revealed":[134],"key":[137,151],"within":[138],"1,000":[139],"encryptions.":[140],"The":[141],"result":[142],"information":[144],"leakage":[145],"shows":[147],"that":[148],"recovered":[154],"99.999%":[156],"confidence":[157],"level.":[158],"Compared":[159],"other":[161],"countermeasures,":[165],"smallest":[171,181,202],"complete":[172],"1.04\u00d7":[177],"resource":[178,198],"overhead":[179],"(the":[180],"hardware":[182],"masking":[183],"countermeasure,":[184],"applied":[187,210,230],"only":[189,211],"ALU":[191,214],"1.59\u00d7":[197],"overhead,":[199],"balancing":[203],"countermeasure":[204,209,263],"processor,":[206],"memory,":[217],"required":[218],"1.15\u00d7":[219],"area":[220],"overhead)":[221],"where":[222],"security":[224],"power":[226,270],"ALU,":[238],"caches,":[239],"Block":[240,242],"RAM,":[241],"RAM":[243],"controller,":[244],"bus":[245],"interconnect":[246],"SD":[248],"card":[249],"interface).":[250],"execution-based":[262],"withstand":[265],"methods":[267],"(such":[268],"trace":[271],"alignment":[272],"noise":[274],"filtering)":[275]},"counts_by_year":[{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":6},{"year":2023,"cited_by_count":2},{"year":2021,"cited_by_count":2}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}