{"id":"https://openalex.org/W2997041852","doi":"https://doi.org/10.1109/iccad45719.2019.8942078","title":"Time-Frame Folding: Back to the Sequentiality","display_name":"Time-Frame Folding: Back to the Sequentiality","publication_year":2019,"publication_date":"2019-11-01","ids":{"openalex":"https://openalex.org/W2997041852","doi":"https://doi.org/10.1109/iccad45719.2019.8942078","mag":"2997041852"},"language":"en","primary_location":{"id":"doi:10.1109/iccad45719.2019.8942078","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccad45719.2019.8942078","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5039939942","display_name":"Po-Chun Chien","orcid":"https://orcid.org/0000-0001-5139-5178"},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Po-Chun Chien","raw_affiliation_strings":["Graduate Institute of Electronics Engineering, National Taiwan University,Taipei,Taiwan","Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan"],"affiliations":[{"raw_affiliation_string":"Graduate Institute of Electronics Engineering, National Taiwan University,Taipei,Taiwan","institution_ids":["https://openalex.org/I16733864"]},{"raw_affiliation_string":"Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan","institution_ids":["https://openalex.org/I16733864"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5078604015","display_name":"Jie-Hong R. Jiang","orcid":"https://orcid.org/0000-0002-2279-4732"},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Jie-Hong R. Jiang","raw_affiliation_strings":["National Taiwan University,Department of Electrical Engineering,Taipei,Taiwan"],"affiliations":[{"raw_affiliation_string":"National Taiwan University,Department of Electrical Engineering,Taipei,Taiwan","institution_ids":["https://openalex.org/I16733864"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5039939942"],"corresponding_institution_ids":["https://openalex.org/I16733864"],"apc_list":null,"apc_paid":null,"fwci":0.6396,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.74045634,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"8"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10743","display_name":"Software Testing and Debugging Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1712","display_name":"Software"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10743","display_name":"Software Testing and Debugging Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1712","display_name":"Software"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10142","display_name":"Formal Methods in Verification","score":0.9977999925613403,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/folding","display_name":"Folding (DSP implementation)","score":0.6947028636932373},{"id":"https://openalex.org/keywords/frame","display_name":"Frame (networking)","score":0.6862238645553589},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6294389963150024},{"id":"https://openalex.org/keywords/context","display_name":"Context (archaeology)","score":0.6255542635917664},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.5523244142532349},{"id":"https://openalex.org/keywords/bounded-function","display_name":"Bounded function","score":0.5413820743560791},{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"Automatic test pattern generation","score":0.5293914675712585},{"id":"https://openalex.org/keywords/state","display_name":"State (computer science)","score":0.4983944892883301},{"id":"https://openalex.org/keywords/generalization","display_name":"Generalization","score":0.47034457325935364},{"id":"https://openalex.org/keywords/combinational-logic","display_name":"Combinational logic","score":0.444460928440094},{"id":"https://openalex.org/keywords/sequential-logic","display_name":"Sequential logic","score":0.44072240591049194},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.22150754928588867},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.20520830154418945},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.19636815786361694},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.17206299304962158},{"id":"https://openalex.org/keywords/structural-engineering","display_name":"Structural engineering","score":0.10557928681373596}],"concepts":[{"id":"https://openalex.org/C2776545253","wikidata":"https://www.wikidata.org/wiki/Q5464292","display_name":"Folding (DSP implementation)","level":2,"score":0.6947028636932373},{"id":"https://openalex.org/C126042441","wikidata":"https://www.wikidata.org/wiki/Q1324888","display_name":"Frame (networking)","level":2,"score":0.6862238645553589},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6294389963150024},{"id":"https://openalex.org/C2779343474","wikidata":"https://www.wikidata.org/wiki/Q3109175","display_name":"Context (archaeology)","level":2,"score":0.6255542635917664},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.5523244142532349},{"id":"https://openalex.org/C34388435","wikidata":"https://www.wikidata.org/wiki/Q2267362","display_name":"Bounded function","level":2,"score":0.5413820743560791},{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.5293914675712585},{"id":"https://openalex.org/C48103436","wikidata":"https://www.wikidata.org/wiki/Q599031","display_name":"State (computer science)","level":2,"score":0.4983944892883301},{"id":"https://openalex.org/C177148314","wikidata":"https://www.wikidata.org/wiki/Q170084","display_name":"Generalization","level":2,"score":0.47034457325935364},{"id":"https://openalex.org/C81409106","wikidata":"https://www.wikidata.org/wiki/Q76505","display_name":"Combinational logic","level":3,"score":0.444460928440094},{"id":"https://openalex.org/C187075797","wikidata":"https://www.wikidata.org/wiki/Q173245","display_name":"Sequential logic","level":3,"score":0.44072240591049194},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.22150754928588867},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.20520830154418945},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.19636815786361694},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.17206299304962158},{"id":"https://openalex.org/C66938386","wikidata":"https://www.wikidata.org/wiki/Q633538","display_name":"Structural engineering","level":1,"score":0.10557928681373596},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iccad45719.2019.8942078","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccad45719.2019.8942078","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W156271197","https://openalex.org/W1528837436","https://openalex.org/W1550462819","https://openalex.org/W1787074469","https://openalex.org/W1992482178","https://openalex.org/W2004929506","https://openalex.org/W2019084820","https://openalex.org/W2038283820","https://openalex.org/W2090073529","https://openalex.org/W2093176534","https://openalex.org/W2118615994","https://openalex.org/W2154382131","https://openalex.org/W2156366819","https://openalex.org/W2528791244","https://openalex.org/W2754920556"],"related_works":["https://openalex.org/W1412895167","https://openalex.org/W2132684947","https://openalex.org/W4238986168","https://openalex.org/W2165817266","https://openalex.org/W1493811107","https://openalex.org/W2134454856","https://openalex.org/W2120257283","https://openalex.org/W2117563988","https://openalex.org/W2161696808","https://openalex.org/W4240466429"],"abstract_inverted_index":{"In":[0],"this":[1],"paper":[2],"we":[3],"formulate":[4],"time-frame":[5,13,20,86],"folding":[6],"(TFF)":[7],"as":[8,19,81],"the":[9,33,52,55,61,82,103,107],"reverse":[10],"operation":[11],"of":[12,49,63,84,106,114],"unfolding":[14],"(TFU),":[15],"or":[16],"commonly":[17],"known":[18],"expansion":[21,47],"in":[22,60,120,128],"automatic":[23],"test":[24],"pattern":[25],"generation":[26,65],"(ATPG)":[27],"and":[28,66,70,124],"(un)bounded":[29],"model":[30],"checking.":[31],"While":[32],"latter":[34],"converts":[35],"a":[36,40,96],"sequential":[37],"circuit":[38,109,121],"into":[39],"combinational":[41,108],"one":[42],"with":[43,102],"respect":[44],"to":[45],"some":[46],"bound":[48],"k":[50],"time-frames,":[51],"former":[53],"attempts":[54],"opposite.":[56],"TFF":[57,76],"arises":[58],"naturally":[59],"context":[62],"testbench":[64],"bounded":[67],"strategy":[68],"generalization,":[69],"yet":[71],"remains":[72],"unstudied.":[73],"Unlike":[74],"TFU,":[75],"can":[77,87],"be":[78,88],"highly":[79],"nontrivial":[80],"subcircuit":[83],"each":[85],"distinct.":[89],"We":[90],"propose":[91],"an":[92],"algorithm":[93],"that":[94],"finds":[95],"minimum-state":[97],"finite":[98],"state":[99],"machine":[100],"consistent":[101],"input-output":[104],"behavior":[105],"under":[110],"folding.":[111],"Empirical":[112],"evaluation":[113],"our":[115],"method":[116],"demonstrates":[117],"its":[118],"ability":[119],"size":[122],"compaction":[123],"suggests":[125],"potential":[126],"use":[127],"different":[129],"application":[130],"domains.":[131]},"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}