{"id":"https://openalex.org/W2997871849","doi":"https://doi.org/10.1109/iccad45719.2019.8942075","title":"elfPlace: Electrostatics-based Placement for Large-Scale Heterogeneous FPGAs","display_name":"elfPlace: Electrostatics-based Placement for Large-Scale Heterogeneous FPGAs","publication_year":2019,"publication_date":"2019-11-01","ids":{"openalex":"https://openalex.org/W2997871849","doi":"https://doi.org/10.1109/iccad45719.2019.8942075","mag":"2997871849"},"language":"en","primary_location":{"id":"doi:10.1109/iccad45719.2019.8942075","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccad45719.2019.8942075","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5034982668","display_name":"Wuxi Li","orcid":"https://orcid.org/0000-0002-9887-5109"},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Wuxi Li","raw_affiliation_strings":["University of Texas at Austin, Austin, Texas, USA","University of Texas at Austin,ECE Department,Austin,Texas,USA"],"affiliations":[{"raw_affiliation_string":"University of Texas at Austin, Austin, Texas, USA","institution_ids":["https://openalex.org/I86519309"]},{"raw_affiliation_string":"University of Texas at Austin,ECE Department,Austin,Texas,USA","institution_ids":["https://openalex.org/I86519309"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5000933188","display_name":"Yibo Lin","orcid":"https://orcid.org/0000-0002-0977-2774"},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Yibo Lin","raw_affiliation_strings":["University of Texas at Austin, Austin, Texas, USA","University of Texas at Austin,ECE Department,Austin,Texas,USA"],"affiliations":[{"raw_affiliation_string":"University of Texas at Austin, Austin, Texas, USA","institution_ids":["https://openalex.org/I86519309"]},{"raw_affiliation_string":"University of Texas at Austin,ECE Department,Austin,Texas,USA","institution_ids":["https://openalex.org/I86519309"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5011883763","display_name":"David Z. Pan","orcid":"https://orcid.org/0000-0002-5705-2501"},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"David Z. Pan","raw_affiliation_strings":["University of Texas at Austin, Austin, Texas, USA","University of Texas at Austin,ECE Department,Austin,Texas,USA"],"affiliations":[{"raw_affiliation_string":"University of Texas at Austin, Austin, Texas, USA","institution_ids":["https://openalex.org/I86519309"]},{"raw_affiliation_string":"University of Texas at Austin,ECE Department,Austin,Texas,USA","institution_ids":["https://openalex.org/I86519309"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5034982668"],"corresponding_institution_ids":["https://openalex.org/I86519309"],"apc_list":null,"apc_paid":null,"fwci":1.55,"has_fulltext":false,"cited_by_count":41,"citation_normalized_percentile":{"value":0.83926724,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":96,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"8"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.713016927242279},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7037023901939392},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.672633945941925},{"id":"https://openalex.org/keywords/subgradient-method","display_name":"Subgradient method","score":0.6013832092285156},{"id":"https://openalex.org/keywords/cluster-analysis","display_name":"Cluster analysis","score":0.5394080877304077},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5298734903335571},{"id":"https://openalex.org/keywords/minification","display_name":"Minification","score":0.4631962180137634},{"id":"https://openalex.org/keywords/multiplier","display_name":"Multiplier (economics)","score":0.4379113018512726},{"id":"https://openalex.org/keywords/augmented-lagrangian-method","display_name":"Augmented Lagrangian method","score":0.4370661675930023},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.43432188034057617},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.219228595495224},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.1450875699520111}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.713016927242279},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7037023901939392},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.672633945941925},{"id":"https://openalex.org/C158968445","wikidata":"https://www.wikidata.org/wiki/Q7631150","display_name":"Subgradient method","level":2,"score":0.6013832092285156},{"id":"https://openalex.org/C73555534","wikidata":"https://www.wikidata.org/wiki/Q622825","display_name":"Cluster analysis","level":2,"score":0.5394080877304077},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5298734903335571},{"id":"https://openalex.org/C147764199","wikidata":"https://www.wikidata.org/wiki/Q6865248","display_name":"Minification","level":2,"score":0.4631962180137634},{"id":"https://openalex.org/C124584101","wikidata":"https://www.wikidata.org/wiki/Q1053266","display_name":"Multiplier (economics)","level":2,"score":0.4379113018512726},{"id":"https://openalex.org/C150452318","wikidata":"https://www.wikidata.org/wiki/Q4820432","display_name":"Augmented Lagrangian method","level":2,"score":0.4370661675930023},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.43432188034057617},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.219228595495224},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.1450875699520111},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iccad45719.2019.8942075","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccad45719.2019.8942075","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":23,"referenced_works":["https://openalex.org/W1985292881","https://openalex.org/W2020549672","https://openalex.org/W2075137913","https://openalex.org/W2079559808","https://openalex.org/W2099184857","https://openalex.org/W2111104699","https://openalex.org/W2132693178","https://openalex.org/W2138206217","https://openalex.org/W2139637699","https://openalex.org/W2154014710","https://openalex.org/W2154302973","https://openalex.org/W2158961316","https://openalex.org/W2162141797","https://openalex.org/W2328615082","https://openalex.org/W2738078952","https://openalex.org/W2770762651","https://openalex.org/W2774510317","https://openalex.org/W2801898382","https://openalex.org/W2884307971","https://openalex.org/W2897282114","https://openalex.org/W2913988959","https://openalex.org/W2917241406","https://openalex.org/W2945592068"],"related_works":["https://openalex.org/W2359120930","https://openalex.org/W2037613239","https://openalex.org/W2781777036","https://openalex.org/W2390469630","https://openalex.org/W2059050877","https://openalex.org/W1971290991","https://openalex.org/W2172263749","https://openalex.org/W2036724572","https://openalex.org/W2172478086","https://openalex.org/W102932032"],"abstract_inverted_index":{"elfplace":[0],"is":[1],"a":[2,54,58,72],"flat":[3],"nonlinear":[4],"placement":[5,19],"algorithm":[6],"for":[7],"large-scale":[8],"heterogeneous":[9,32],"field-programmable":[10],"gate":[11],"arrays":[12],"(FPGAs).":[13],"We":[14],"adopt":[15],"the":[16],"analogy":[17],"between":[18],"and":[20,27,44,57,84,106,112],"electrostatic":[21],"systems":[22],"initially":[23],"proposed":[24],"by":[25,108],"ePlace":[26],"extend":[28],"it":[29],"to":[30,78],"tackle":[31],"blocks":[33],"in":[34,115],"FPGA":[35,101],"designs.":[36],"To":[37],"achieve":[38],"satisfiable":[39],"solution":[40],"quality":[41],"with":[42,53,118],"fast":[43],"robust":[45],"numerical":[46],"convergence,":[47],"an":[48],"augmented":[49],"Lagrangian":[50],"formulation":[51],"together":[52],"preconditioning":[55],"technique":[56],"normalized":[59],"subgradient-based":[60],"multiplier":[61],"updating":[62],"scheme":[63,77],"are":[64],"proposed.":[65],"Besides":[66],"pure-wirelength":[67],"minimization,":[68],"we":[69],"also":[70],"propose":[71],"unified":[73],"instance":[74],"area":[75],"adjustment":[76],"simultaneously":[79],"optimize":[80],"routability,":[81],"pin":[82],"density,":[83],"downstream":[85],"clustering":[86],"compatibility.":[87],"Our":[88],"experiments":[89],"on":[90],"ISPD":[91],"2016":[92],"benchmark":[93],"suite":[94],"show":[95],"that":[96],"elfPlace":[97],"outperforms":[98],"four":[99],"state-of-the-art":[100],"placers":[102],"UTPlaceF,":[103],"RippleFPGA,":[104],"GPlace3.0,":[105],"UTPlaceF-DL":[107],"13.6%,":[109],"11.3%,":[110],"8.9%,":[111],"7.1%,":[113],"respectively,":[114],"routed":[116],"wirelength":[117],"competitive":[119],"runtime.":[120]},"counts_by_year":[{"year":2025,"cited_by_count":9},{"year":2024,"cited_by_count":11},{"year":2023,"cited_by_count":8},{"year":2022,"cited_by_count":6},{"year":2021,"cited_by_count":4},{"year":2020,"cited_by_count":3}],"updated_date":"2026-01-10T23:39:48.068659","created_date":"2025-10-10T00:00:00"}
