{"id":"https://openalex.org/W2771210328","doi":"https://doi.org/10.1109/iccad.2017.8203894","title":"Generating FPGA-based image processing accelerators with Hipacc: (Invited paper)","display_name":"Generating FPGA-based image processing accelerators with Hipacc: (Invited paper)","publication_year":2017,"publication_date":"2017-11-01","ids":{"openalex":"https://openalex.org/W2771210328","doi":"https://doi.org/10.1109/iccad.2017.8203894","mag":"2771210328"},"language":"en","primary_location":{"id":"doi:10.1109/iccad.2017.8203894","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccad.2017.8203894","pdf_url":null,"source":{"id":"https://openalex.org/S4363608376","display_name":"2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5051274212","display_name":"Oliver Reiche","orcid":"https://orcid.org/0000-0002-5125-4508"},"institutions":[{"id":"https://openalex.org/I181369854","display_name":"Friedrich-Alexander-Universit\u00e4t Erlangen-N\u00fcrnberg","ror":"https://ror.org/00f7hpc57","country_code":"DE","type":"education","lineage":["https://openalex.org/I181369854"]}],"countries":["DE"],"is_corresponding":true,"raw_author_name":"Oliver Reiche","raw_affiliation_strings":["Department of Computer Science, Friedrich-Alexander University Erlangen"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, Friedrich-Alexander University Erlangen","institution_ids":["https://openalex.org/I181369854"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5061837918","display_name":"M. Akif \u00d6zkan","orcid":"https://orcid.org/0000-0001-5067-2268"},"institutions":[{"id":"https://openalex.org/I181369854","display_name":"Friedrich-Alexander-Universit\u00e4t Erlangen-N\u00fcrnberg","ror":"https://ror.org/00f7hpc57","country_code":"DE","type":"education","lineage":["https://openalex.org/I181369854"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"M. Akif Ozkan","raw_affiliation_strings":["Department of Computer Science, Friedrich-Alexander University Erlangen"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, Friedrich-Alexander University Erlangen","institution_ids":["https://openalex.org/I181369854"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5024954324","display_name":"Richard Membarth","orcid":"https://orcid.org/0000-0002-9979-7579"},"institutions":[{"id":"https://openalex.org/I33256026","display_name":"German Research Centre for Artificial Intelligence","ror":"https://ror.org/01ayc5b57","country_code":"DE","type":"funder","lineage":["https://openalex.org/I33256026"]},{"id":"https://openalex.org/I91712215","display_name":"Saarland University","ror":"https://ror.org/01jdpyv68","country_code":"DE","type":"education","lineage":["https://openalex.org/I91712215"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Richard Membarth","raw_affiliation_strings":["German Research Center for Artificial Intelligence, Saarland University"],"affiliations":[{"raw_affiliation_string":"German Research Center for Artificial Intelligence, Saarland University","institution_ids":["https://openalex.org/I33256026","https://openalex.org/I91712215"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5076672029","display_name":"J\u00fcrgen Teich","orcid":"https://orcid.org/0000-0001-6285-5862"},"institutions":[{"id":"https://openalex.org/I181369854","display_name":"Friedrich-Alexander-Universit\u00e4t Erlangen-N\u00fcrnberg","ror":"https://ror.org/00f7hpc57","country_code":"DE","type":"education","lineage":["https://openalex.org/I181369854"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Jurgen Teich","raw_affiliation_strings":["Department of Computer Science, Friedrich-Alexander University Erlangen"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, Friedrich-Alexander University Erlangen","institution_ids":["https://openalex.org/I181369854"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5072039340","display_name":"Frank Hannig","orcid":"https://orcid.org/0000-0003-3663-6484"},"institutions":[{"id":"https://openalex.org/I181369854","display_name":"Friedrich-Alexander-Universit\u00e4t Erlangen-N\u00fcrnberg","ror":"https://ror.org/00f7hpc57","country_code":"DE","type":"education","lineage":["https://openalex.org/I181369854"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Frank Hannig","raw_affiliation_strings":["Department of Computer Science, Friedrich-Alexander University Erlangen"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, Friedrich-Alexander University Erlangen","institution_ids":["https://openalex.org/I181369854"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5051274212"],"corresponding_institution_ids":["https://openalex.org/I181369854"],"apc_list":null,"apc_paid":null,"fwci":1.3092,"has_fulltext":false,"cited_by_count":25,"citation_normalized_percentile":{"value":0.79359431,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"1026","last_page":"1033"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9965999722480774,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8639602661132812},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.7928981781005859},{"id":"https://openalex.org/keywords/digital-subscriber-line","display_name":"Digital subscriber line","score":0.6843627095222473},{"id":"https://openalex.org/keywords/compiler","display_name":"Compiler","score":0.6585315465927124},{"id":"https://openalex.org/keywords/domain-specific-language","display_name":"Domain-specific language","score":0.601080060005188},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5720568299293518},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.5306200981140137},{"id":"https://openalex.org/keywords/domain","display_name":"Domain (mathematical analysis)","score":0.5024683475494385},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.47151482105255127},{"id":"https://openalex.org/keywords/abstraction-layer","display_name":"Abstraction layer","score":0.45930373668670654},{"id":"https://openalex.org/keywords/implementation","display_name":"Implementation","score":0.45471641421318054},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.34835195541381836},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.22286921739578247},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.21967670321464539}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8639602661132812},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.7928981781005859},{"id":"https://openalex.org/C201374245","wikidata":"https://www.wikidata.org/wiki/Q104534","display_name":"Digital subscriber line","level":2,"score":0.6843627095222473},{"id":"https://openalex.org/C169590947","wikidata":"https://www.wikidata.org/wiki/Q47506","display_name":"Compiler","level":2,"score":0.6585315465927124},{"id":"https://openalex.org/C135257023","wikidata":"https://www.wikidata.org/wiki/Q691358","display_name":"Domain-specific language","level":2,"score":0.601080060005188},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5720568299293518},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.5306200981140137},{"id":"https://openalex.org/C36503486","wikidata":"https://www.wikidata.org/wiki/Q11235244","display_name":"Domain (mathematical analysis)","level":2,"score":0.5024683475494385},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.47151482105255127},{"id":"https://openalex.org/C147358964","wikidata":"https://www.wikidata.org/wiki/Q1200992","display_name":"Abstraction layer","level":3,"score":0.45930373668670654},{"id":"https://openalex.org/C26713055","wikidata":"https://www.wikidata.org/wiki/Q245962","display_name":"Implementation","level":2,"score":0.45471641421318054},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.34835195541381836},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.22286921739578247},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.21967670321464539},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iccad.2017.8203894","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccad.2017.8203894","pdf_url":null,"source":{"id":"https://openalex.org/S4363608376","display_name":"2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8999999761581421,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320309480","display_name":"Nvidia","ror":"https://ror.org/03jdj4y14"},{"id":"https://openalex.org/F4320320879","display_name":"Deutsche Forschungsgemeinschaft","ror":"https://ror.org/018mejw64"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":21,"referenced_works":["https://openalex.org/W631225344","https://openalex.org/W1499225944","https://openalex.org/W1536852470","https://openalex.org/W1558703166","https://openalex.org/W1616186945","https://openalex.org/W1669383326","https://openalex.org/W1980208272","https://openalex.org/W2037089143","https://openalex.org/W2075745057","https://openalex.org/W2099244020","https://openalex.org/W2103431534","https://openalex.org/W2111308925","https://openalex.org/W2174563406","https://openalex.org/W2191327475","https://openalex.org/W2466242877","https://openalex.org/W2475663704","https://openalex.org/W2517689844","https://openalex.org/W2524530727","https://openalex.org/W2623389408","https://openalex.org/W4246447814","https://openalex.org/W6659591957"],"related_works":["https://openalex.org/W2885657154","https://openalex.org/W4289709346","https://openalex.org/W2119542776","https://openalex.org/W2014596857","https://openalex.org/W2582410692","https://openalex.org/W2140083133","https://openalex.org/W1485300234","https://openalex.org/W2258960507","https://openalex.org/W2460228634","https://openalex.org/W2055606014"],"abstract_inverted_index":{"Domain-Specific":[0],"Languages":[1],"(DSLs)":[2],"provide":[3],"a":[4,13,18,31,106,130],"high-level":[5,132,153],"and":[6,41,56,83,108,146],"domain-specific":[7],"abstraction":[8],"to":[9,91,122,165],"describe":[10],"algorithms":[11],"within":[12],"certain":[14],"domain":[15,69,117],"concisely.":[16],"Since":[17],"DSL":[19,107,133,173],"separates":[20],"the":[21,25,44,68,94,103,161,171],"algorithm":[22],"description":[23,134],"from":[24,129,169],"actual":[26],"target":[27,64],"implementation,":[28],"it":[29],"offers":[30],"high":[32],"flexibility":[33],"among":[34,93],"heterogeneous":[35],"hardware":[36,163],"targets,":[37],"such":[38],"as":[39,149,151],"CPUs":[40],"GPUs.":[42],"With":[43],"recent":[45],"uprise":[46],"of":[47,70],"promising":[48],"High-Level":[49],"Synthesis":[50],"(HLS)":[51],"tools,":[52],"like":[53],"Vivado":[54],"HLS":[55,128],"Altera":[57],"OpenCL,":[58],"FPGAs":[59],"are":[60],"becoming":[61],"another":[62],"attractive":[63],"architecture.":[65],"Particularly":[66],"in":[67],"image":[71,112],"processing,":[72],"applications":[73],"often":[74],"come":[75],"with":[76],"stringent":[77],"requirements":[78],"regarding":[79],"performance,":[80],"energy":[81],"efficiency,":[82],"power,":[84],"for":[85,111,126,143],"which":[86],"FPGA":[87],"have":[88],"been":[89],"proven":[90],"be":[92,120],"most":[95],"suitable":[96],"architectures.":[97],"In":[98],"this":[99],"work,":[100],"we":[101],"present":[102],"Hipacc":[104],"framework,":[105],"source-to-source":[109],"compiler":[110],"processing.":[113],"We":[114,155],"show":[115],"that":[116],"knowledge":[118],"can":[119],"captured":[121],"generate":[123],"tailored":[124],"implementations":[125],"C-based":[127],"common":[131],"targeting":[135],"FPGAs.":[136],"Our":[137],"approach":[138,158],"includes":[139],"FPGA-specific":[140],"memory":[141],"architectures":[142],"handling":[144],"point":[145],"local":[147],"operators,":[148],"well":[150],"several":[152],"transformations.":[154],"evaluate":[156],"our":[157],"by":[159],"comparing":[160],"resulting":[162],"accelerators":[164],"GPU":[166],"implementations,":[167],"generated":[168],"exactly":[170],"same":[172],"source":[174],"code.":[175]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":3},{"year":2023,"cited_by_count":4},{"year":2022,"cited_by_count":5},{"year":2021,"cited_by_count":4},{"year":2020,"cited_by_count":2},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":2}],"updated_date":"2026-02-25T08:12:03.925757","created_date":"2025-10-10T00:00:00"}
