{"id":"https://openalex.org/W4252178188","doi":"https://doi.org/10.1109/iccad.2015.7372647","title":"Redundancy based interconnect duplication to mitigate soft errors in SRAM-based FPGAs","display_name":"Redundancy based interconnect duplication to mitigate soft errors in SRAM-based FPGAs","publication_year":2015,"publication_date":"2015-11-01","ids":{"openalex":"https://openalex.org/W4252178188","doi":"https://doi.org/10.1109/iccad.2015.7372647"},"language":"en","primary_location":{"id":"doi:10.1109/iccad.2015.7372647","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccad.2015.7372647","pdf_url":null,"source":{"id":"https://openalex.org/S4363608324","display_name":"2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5045693138","display_name":"Naifeng Jing","orcid":"https://orcid.org/0000-0001-8417-5796"},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Naifeng Jing","raw_affiliation_strings":["Department of Micro-Nano Electronics, Shanghai Jiao Tong University, Shanghai, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Micro-Nano Electronics, Shanghai Jiao Tong University, Shanghai, China","institution_ids":["https://openalex.org/I183067930"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5011903670","display_name":"Jiacheng Zhou","orcid":"https://orcid.org/0000-0003-2501-1016"},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jiacheng Zhou","raw_affiliation_strings":["Department of Micro-Nano Electronics, Shanghai Jiao Tong University, Shanghai, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Micro-Nano Electronics, Shanghai Jiao Tong University, Shanghai, China","institution_ids":["https://openalex.org/I183067930"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5008057183","display_name":"Jianfei Jiang","orcid":"https://orcid.org/0000-0002-5521-6197"},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jianfei Jiang","raw_affiliation_strings":["Department of Micro-Nano Electronics, Shanghai Jiao Tong University, Shanghai, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Micro-Nano Electronics, Shanghai Jiao Tong University, Shanghai, China","institution_ids":["https://openalex.org/I183067930"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100363117","display_name":"Xin Chen","orcid":"https://orcid.org/0000-0003-1990-2058"},"institutions":[{"id":"https://openalex.org/I116953780","display_name":"Tongji University","ror":"https://ror.org/03rc6as71","country_code":"CN","type":"education","lineage":["https://openalex.org/I116953780"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xin Chen","raw_affiliation_strings":["School of Electronics and Information Engineering, Tongji University, Shanghai, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electronics and Information Engineering, Tongji University, Shanghai, China","institution_ids":["https://openalex.org/I116953780"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100351675","display_name":"Weifeng He","orcid":"https://orcid.org/0000-0002-5302-4669"},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Weifeng He","raw_affiliation_strings":["Department of Micro-Nano Electronics, Shanghai Jiao Tong University, Shanghai, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Micro-Nano Electronics, Shanghai Jiao Tong University, Shanghai, China","institution_ids":["https://openalex.org/I183067930"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5103236320","display_name":"Zhigang Mao","orcid":"https://orcid.org/0000-0001-9431-9853"},"institutions":[{"id":"https://openalex.org/I183067930","display_name":"Shanghai Jiao Tong University","ror":"https://ror.org/0220qvk04","country_code":"CN","type":"education","lineage":["https://openalex.org/I183067930"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhigang Mao","raw_affiliation_strings":["Department of Micro-Nano Electronics, Shanghai Jiao Tong University, Shanghai, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Micro-Nano Electronics, Shanghai Jiao Tong University, Shanghai, China","institution_ids":["https://openalex.org/I183067930"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":"18","issue":null,"first_page":"764","last_page":"769"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6844862699508667},{"id":"https://openalex.org/keywords/soft-error","display_name":"Soft error","score":0.666884183883667},{"id":"https://openalex.org/keywords/redundancy","display_name":"Redundancy (engineering)","score":0.6498807072639465},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.5812063217163086},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.5660632848739624},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.5545694231987},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5426810383796692},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5324612259864807},{"id":"https://openalex.org/keywords/fault-tolerance","display_name":"Fault tolerance","score":0.48569950461387634},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.4693739414215088},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.3958975672721863},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3247833251953125},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.28708356618881226},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.19075140357017517},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.17310968041419983}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6844862699508667},{"id":"https://openalex.org/C154474529","wikidata":"https://www.wikidata.org/wiki/Q1658917","display_name":"Soft error","level":2,"score":0.666884183883667},{"id":"https://openalex.org/C152124472","wikidata":"https://www.wikidata.org/wiki/Q1204361","display_name":"Redundancy (engineering)","level":2,"score":0.6498807072639465},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.5812063217163086},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.5660632848739624},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.5545694231987},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5426810383796692},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5324612259864807},{"id":"https://openalex.org/C63540848","wikidata":"https://www.wikidata.org/wiki/Q3140932","display_name":"Fault tolerance","level":2,"score":0.48569950461387634},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.4693739414215088},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.3958975672721863},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3247833251953125},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.28708356618881226},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.19075140357017517},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.17310968041419983},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iccad.2015.7372647","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccad.2015.7372647","pdf_url":null,"source":{"id":"https://openalex.org/S4363608324","display_name":"2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W160422864","https://openalex.org/W1964218206","https://openalex.org/W1970278706","https://openalex.org/W1970885193","https://openalex.org/W2015213746","https://openalex.org/W2030765577","https://openalex.org/W2044114416","https://openalex.org/W2115022735","https://openalex.org/W2131044255","https://openalex.org/W2134426126","https://openalex.org/W2139637699","https://openalex.org/W2142654748","https://openalex.org/W2163131937","https://openalex.org/W2171549192","https://openalex.org/W3142488006","https://openalex.org/W3146295682","https://openalex.org/W4240833370","https://openalex.org/W6654209339","https://openalex.org/W6661308537","https://openalex.org/W6679345621"],"related_works":["https://openalex.org/W4290647047","https://openalex.org/W1500230652","https://openalex.org/W2363504003","https://openalex.org/W2066033226","https://openalex.org/W2548582980","https://openalex.org/W2620706469","https://openalex.org/W2052914698","https://openalex.org/W2088929465","https://openalex.org/W2612883256","https://openalex.org/W4386933833"],"abstract_inverted_index":{"Soft":[0],"error":[1],"induced":[2],"reliability":[3,144],"problem":[4],"has":[5],"already":[6],"become":[7],"a":[8,29,53,99,146],"major":[9],"concern":[10],"for":[11,67],"modern":[12],"SRAM-based":[13],"FPGAs":[14],"(Field":[15],"Programmable":[16],"Gate":[17],"Arrays)":[18],"even":[19],"at":[20],"the":[21,35,44,56,86,103,113,123,136,142],"ground":[22],"level.":[23],"In":[24,117],"this":[25],"paper,":[26],"we":[27],"propose":[28],"duplication-with-recovery":[30],"(DWR)":[31],"technique":[32],"to":[33,43],"recover":[34],"configuration":[36,115],"bit":[37],"faults":[38],"on":[39,52,55],"interconnects,":[40],"which":[41,108],"contribute":[42],"majority":[45],"of":[46,102],"soft":[47],"errors":[48],"in":[49,60,109,145],"FPGAs.":[50],"Based":[51],"study":[54],"detailed":[57],"routing":[58,126],"structure":[59],"real":[61],"FPGAs,":[62],"DWR":[63,84,119],"leverages":[64],"redundant":[65],"resources":[66],"interconnect":[68],"duplication":[69],"and":[70,125,131],"enables":[71],"fault":[72,81,87],"recovery":[73],"with":[74,79],"lightweight":[75],"circuit-level":[76],"support.":[77],"Compared":[78],"traditional":[80],"tolerant":[82],"techniques,":[83],"retains":[85],"recovering":[88],"capability":[89],"but":[90,139],"eliminates":[91],"expensive":[92],"copies.":[93],"The":[94],"experimental":[95],"results":[96],"show":[97],"that":[98],"large":[100],"portion":[101],"interconnects":[104],"can":[105],"be":[106],"protected,":[107],"consequence":[110],"significantly":[111],"reduces":[112],"vulnerable":[114],"bits.":[116],"addition,":[118],"does":[120,133],"not":[121,134],"alter":[122],"placement":[124],"from":[127],"standard":[128],"design":[129,137,143],"flow,":[130],"therefore":[132],"affect":[135],"closure":[138],"greatly":[140],"improves":[141],"cost-effective":[147],"way.":[148]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2017,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}