{"id":"https://openalex.org/W4241883822","doi":"https://doi.org/10.1109/iccad.2015.7372545","title":"A light-weighted software-controlled cache for PCM-based main memory systems","display_name":"A light-weighted software-controlled cache for PCM-based main memory systems","publication_year":2015,"publication_date":"2015-11-01","ids":{"openalex":"https://openalex.org/W4241883822","doi":"https://doi.org/10.1109/iccad.2015.7372545"},"language":"en","primary_location":{"id":"doi:10.1109/iccad.2015.7372545","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccad.2015.7372545","pdf_url":null,"source":{"id":"https://openalex.org/S4363608324","display_name":"2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5104059482","display_name":"Hung-Sheng Chang","orcid":null},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Hung-Sheng Chang","raw_affiliation_strings":["Department of Computer Science and Information Engineering, National Taiwan University, Taipei, Taiwan R.O.C","Macronix Emerging System Lab, Macronix International Co., Ltd., Hsinchu, Taiwan R.O.C"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Information Engineering, National Taiwan University, Taipei, Taiwan R.O.C","institution_ids":["https://openalex.org/I16733864"]},{"raw_affiliation_string":"Macronix Emerging System Lab, Macronix International Co., Ltd., Hsinchu, Taiwan R.O.C","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5073534245","display_name":"Yuan-Hao Chang","orcid":"https://orcid.org/0000-0002-1282-2111"},"institutions":[{"id":"https://openalex.org/I4210098366","display_name":"Institute of Information Science, Academia Sinica","ror":"https://ror.org/00z83z196","country_code":"TW","type":"facility","lineage":["https://openalex.org/I4210098366","https://openalex.org/I84653119"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Yuan-Hao Chang","raw_affiliation_strings":["Institute of Information Science, Academia Sinica, Taipei, Taiwan R.O.C"],"affiliations":[{"raw_affiliation_string":"Institute of Information Science, Academia Sinica, Taipei, Taiwan R.O.C","institution_ids":["https://openalex.org/I4210098366"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5056407308","display_name":"Tei\u2010Wei Kuo","orcid":"https://orcid.org/0000-0003-1974-0394"},"institutions":[{"id":"https://openalex.org/I4210098366","display_name":"Institute of Information Science, Academia Sinica","ror":"https://ror.org/00z83z196","country_code":"TW","type":"facility","lineage":["https://openalex.org/I4210098366","https://openalex.org/I84653119"]},{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Tei-Wei Kuo","raw_affiliation_strings":["Department of Computer Science and Information Engineering, National Taiwan University, Taipei, Taiwan R.O.C","Institute of Information Science, Academia Sinica, Taipei, Taiwan R.O.C","Research Center of Information Technology Innovation, Academia Sinica, Taipei, Taiwan R.O.C"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Information Engineering, National Taiwan University, Taipei, Taiwan R.O.C","institution_ids":["https://openalex.org/I16733864"]},{"raw_affiliation_string":"Institute of Information Science, Academia Sinica, Taipei, Taiwan R.O.C","institution_ids":["https://openalex.org/I4210098366"]},{"raw_affiliation_string":"Research Center of Information Technology Innovation, Academia Sinica, Taipei, Taiwan R.O.C","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5046909810","display_name":"Hsiang-Pang Li","orcid":"https://orcid.org/0000-0001-6805-4767"},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Hsiang-Pang Li","raw_affiliation_strings":["Department of Computer Science and Information Engineering, National Taiwan University, Taipei, Taiwan R.O.C","Macronix Emerging System Lab, Macronix International Co., Ltd., Hsinchu, Taiwan R.O.C"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Information Engineering, National Taiwan University, Taipei, Taiwan R.O.C","institution_ids":["https://openalex.org/I16733864"]},{"raw_affiliation_string":"Macronix Emerging System Lab, Macronix International Co., Ltd., Hsinchu, Taiwan R.O.C","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5104059482"],"corresponding_institution_ids":["https://openalex.org/I16733864"],"apc_list":null,"apc_paid":null,"fwci":0.743,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":{"value":0.59111111,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"99 1","issue":null,"first_page":"22","last_page":"29"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11181","display_name":"Advanced Data Storage Technologies","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9970999956130981,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8239039182662964},{"id":"https://openalex.org/keywords/cache","display_name":"Cache","score":0.7838393449783325},{"id":"https://openalex.org/keywords/translation-lookaside-buffer","display_name":"Translation lookaside buffer","score":0.7634063959121704},{"id":"https://openalex.org/keywords/dram","display_name":"Dram","score":0.5837985277175903},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5435478687286377},{"id":"https://openalex.org/keywords/cache-coloring","display_name":"Cache coloring","score":0.5107031464576721},{"id":"https://openalex.org/keywords/cpu-cache","display_name":"CPU cache","score":0.5100193619728088},{"id":"https://openalex.org/keywords/universal-memory","display_name":"Universal memory","score":0.47943347692489624},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.46859827637672424},{"id":"https://openalex.org/keywords/cache-pollution","display_name":"Cache pollution","score":0.452379047870636},{"id":"https://openalex.org/keywords/memory-management","display_name":"Memory management","score":0.4376000463962555},{"id":"https://openalex.org/keywords/cas-latency","display_name":"CAS latency","score":0.4346996247768402},{"id":"https://openalex.org/keywords/cache-algorithms","display_name":"Cache algorithms","score":0.4213528037071228},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.41468262672424316},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.41361895203590393},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.27378520369529724},{"id":"https://openalex.org/keywords/memory-controller","display_name":"Memory controller","score":0.20735543966293335},{"id":"https://openalex.org/keywords/physical-address","display_name":"Physical address","score":0.2061801254749298},{"id":"https://openalex.org/keywords/interleaved-memory","display_name":"Interleaved memory","score":0.20199257135391235},{"id":"https://openalex.org/keywords/semiconductor-memory","display_name":"Semiconductor memory","score":0.1862470805644989}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8239039182662964},{"id":"https://openalex.org/C115537543","wikidata":"https://www.wikidata.org/wiki/Q165596","display_name":"Cache","level":2,"score":0.7838393449783325},{"id":"https://openalex.org/C116007543","wikidata":"https://www.wikidata.org/wiki/Q1071403","display_name":"Translation lookaside buffer","level":4,"score":0.7634063959121704},{"id":"https://openalex.org/C7366592","wikidata":"https://www.wikidata.org/wiki/Q1255620","display_name":"Dram","level":2,"score":0.5837985277175903},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5435478687286377},{"id":"https://openalex.org/C201148951","wikidata":"https://www.wikidata.org/wiki/Q5015976","display_name":"Cache coloring","level":4,"score":0.5107031464576721},{"id":"https://openalex.org/C189783530","wikidata":"https://www.wikidata.org/wiki/Q352090","display_name":"CPU cache","level":3,"score":0.5100193619728088},{"id":"https://openalex.org/C195053848","wikidata":"https://www.wikidata.org/wiki/Q7894141","display_name":"Universal memory","level":5,"score":0.47943347692489624},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.46859827637672424},{"id":"https://openalex.org/C113166858","wikidata":"https://www.wikidata.org/wiki/Q5015981","display_name":"Cache pollution","level":5,"score":0.452379047870636},{"id":"https://openalex.org/C176649486","wikidata":"https://www.wikidata.org/wiki/Q2308807","display_name":"Memory management","level":3,"score":0.4376000463962555},{"id":"https://openalex.org/C189930140","wikidata":"https://www.wikidata.org/wiki/Q1112878","display_name":"CAS latency","level":4,"score":0.4346996247768402},{"id":"https://openalex.org/C38556500","wikidata":"https://www.wikidata.org/wiki/Q13404475","display_name":"Cache algorithms","level":4,"score":0.4213528037071228},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.41468262672424316},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.41361895203590393},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.27378520369529724},{"id":"https://openalex.org/C100800780","wikidata":"https://www.wikidata.org/wiki/Q1175867","display_name":"Memory controller","level":3,"score":0.20735543966293335},{"id":"https://openalex.org/C41036726","wikidata":"https://www.wikidata.org/wiki/Q844824","display_name":"Physical address","level":3,"score":0.2061801254749298},{"id":"https://openalex.org/C63511323","wikidata":"https://www.wikidata.org/wiki/Q908936","display_name":"Interleaved memory","level":4,"score":0.20199257135391235},{"id":"https://openalex.org/C98986596","wikidata":"https://www.wikidata.org/wiki/Q1143031","display_name":"Semiconductor memory","level":2,"score":0.1862470805644989}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/iccad.2015.7372545","is_oa":false,"landing_page_url":"https://doi.org/10.1109/iccad.2015.7372545","pdf_url":null,"source":{"id":"https://openalex.org/S4363608324","display_name":"2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"conference"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":24,"referenced_works":["https://openalex.org/W110228718","https://openalex.org/W1983222157","https://openalex.org/W1984418330","https://openalex.org/W1987925106","https://openalex.org/W2021376332","https://openalex.org/W2040392157","https://openalex.org/W2048581837","https://openalex.org/W2048588974","https://openalex.org/W2062604069","https://openalex.org/W2082070657","https://openalex.org/W2104070819","https://openalex.org/W2110860124","https://openalex.org/W2112753327","https://openalex.org/W2114139104","https://openalex.org/W2116394526","https://openalex.org/W2130301020","https://openalex.org/W2135393827","https://openalex.org/W2169863928","https://openalex.org/W3009544624","https://openalex.org/W3128608526","https://openalex.org/W4244361616","https://openalex.org/W4250969878","https://openalex.org/W6679387369","https://openalex.org/W6685102525"],"related_works":["https://openalex.org/W2020244191","https://openalex.org/W2014872264","https://openalex.org/W4241883822","https://openalex.org/W2106754364","https://openalex.org/W2478354953","https://openalex.org/W2567658602","https://openalex.org/W2593841084","https://openalex.org/W1999991706","https://openalex.org/W1564650992","https://openalex.org/W2180663262"],"abstract_inverted_index":{"The":[0,45],"replacement":[1],"of":[2,51,64,80,88],"DRAM":[3,37,53],"with":[4],"non-volatile":[5],"memory":[6],"relies":[7],"on":[8,77],"solutions":[9],"to":[10,84],"resolve":[11],"the":[12,21,41,49,52,59,65,71,81,86,89,94],"wear":[13],"leveling":[14],"and":[15],"slow":[16],"write":[17],"problems.":[18],"Different":[19],"from":[20,61],"past":[22],"work":[23],"in":[24,48],"compiler-assisted":[25],"optimization":[26],"or":[27,70],"joint":[28],"DRAM-PCM":[29],"management":[30,50],"strategies,":[31],"we":[32],"explore":[33],"a":[34,62,78],"light-weighted":[35],"software-controlled":[36],"cache":[38,54],"design":[39],"for":[40,92],"non-volatile-memory-based":[42],"main":[43],"memory.":[44],"run-time":[46],"overheads":[47],"is":[55],"minimized":[56],"by":[57],"utilizing":[58],"information":[60],"miss":[63],"translation":[66],"lookaside":[67],"buffer":[68],"(TLB)":[69],"cache.":[72],"Experiments":[73],"were":[74],"conducted":[75],"based":[76],"series":[79],"well-known":[82],"benchmarks":[83],"evaluate":[85],"effectiveness":[87],"proposed":[90],"design,":[91],"which":[93],"results":[95],"are":[96],"very":[97],"encouraging.":[98]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2017,"cited_by_count":3},{"year":2016,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
